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Keywords: RTL Synthesis Engineer, Location: San Jose, CA

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RTL Synthesis Engineer

Broadcom is looking for a senior level RTL synthesis engineer. Qualifications include: MS in Electrical Engineering... with the Designers to create waivers. Expert in generating Timing Constraints for RTL-Synthesis and PrimeTime-STA for the...

Company: Broadcom
Location: San Jose, CA
Posted Date: 01 Feb 2026

Sr. Principal Software Engineer, Synthesis

synthesis, static timing analysis, computer architecture, verification, RTL compilation, placement, power analysis, routing.... Job Description Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence...

Posted Date: 28 Jan 2026

FPGA / RTL Design Engineer

Pay Rate Range: $140K Job Description: FPGA/RTL Design Engineer to design, implement, and validate digital circuits... and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation...

Company: Varite
Location: San Jose, CA
Posted Date: 31 Jan 2026
Salary: $140000 per year

Senior SoC RTL Design Engineer (remote)

Senior RTL Design Engineer Remote / work from any US location MUST be a US Citizen or US Permanent Resident Full...-V architecture Logic synthesis and static timing analysis Modeling SoC architectures with FPGAs RTL Design including HVLs and HDLs...

Location: San Jose, CA
Posted Date: 29 Jan 2026

ASIC/RTL Design Engineer

your career. THE ROLE: AMD is looking for a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs... to automate these processes for increased efficiency. Proficiency in both front-end (RTL) processes and back-end (Synthesis and P...

Posted Date: 16 Jan 2026

Senior Staff RTL Design Engineer

your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 09 Nov 2025

ASIC RTL Design Technical Lead

RESPONSIBILITIES: As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: Write microarchitecture... integration activities (Lint, CDC, Synthesis, and ECO) Implement design automation via Python or other languages Collaborate...

Posted Date: 29 Jan 2026

IC Design Engineer

Job Overview Seeking an experienced IC Design Engineer to design the digital portions of a high-performance SerDes IP... integration, and silicon validation for high-speed interfaces. Job Description: IC Design Engineer Understanding the...

Company: Broadcom
Location: San Jose, CA
Posted Date: 28 Jan 2026

MTS Digital Design Engineer

an MTS Digital Design Engineer - New Product Development - Power Management, to join our growing team in San Jose, California... and responsibility from definition to release to manufacturing The candidate will lead the digital design architecture, digital RTL, low...

Company: onsemi
Location: San Jose, CA
Posted Date: 27 Jan 2026

ASIC Engineer

Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop... chips. You will also design RTL as per the architecture specs. Your collaboration with architects, and software teams...

Company: Splunk
Location: San Jose, CA
Posted Date: 26 Jan 2026
Salary: $135800 - 193400 per year

MTS Silicon Design Engineer

your career. Job Role and Responsibility: Xilinx, Inc., a subsidiary of AMD, Inc., is hiring MTS Silicon Design Engineer... flow from high-level designs to synthesis, place and route, and timing and power use. Work with cross-functional teams...

Posted Date: 25 Jan 2026

Sr. Silicon Design Engineer

your career. Job Role and Responsibility: Xilinx, Inc., a subsidiary of AMD, Inc., is hiring Sr. Silicon Design Engineer... interfaces/formats for simulation. Perform RTL design and debug of relevant blocks to realize the low power architecture...

Posted Date: 25 Jan 2026

Sr. Silicon Design Engineer

your career. Job Role and Responsibility: Xilinx, Inc., a subsidiary of AMD, Inc., is hiring a Sr. Silicon Design Engineer... all aspects of the process flow from high-level designs to synthesis, place and route, and timing and power use. Work on problems...

Posted Date: 25 Jan 2026

Silicon Design Engineer

your career. Job Role and Responsibility: Xilinx, Inc., a subsidiary of AMD, Inc., is hiring a Silicon Design Engineer.... Evaluate all aspects of the process flow from high-level designs to synthesis, place and route, and timing and power use. Work...

Posted Date: 24 Jan 2026

AI Silicon Design Engineer

your career. THE ROLE: We are looking for an adaptive, self-motivated senior silicon design engineer to join our growing... and are eager to learn and take on new problems. KEY RESPONSIBILITIES: Digital design implementation and micro-architecture RTL...

Posted Date: 16 Jan 2026

IP Design Engineer

your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 16 Jan 2026

Senior Staff Emulation Engineer - ZEBU

. The engineer will also design and develop tests in VHDL/Verilog/System Verilog languages, resolving synthesis and P&R... solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 14 Jan 2026

Senior Staff Emulation Engineer - ZEBU

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 13 Jan 2026

Senior ASIC Design Engineer

to talk to you. What you’ll do: As a Persimmons Senior ASIC Design Engineer, you will be responsible for building... Design teams to ensure RTL quality supports timing closure, power targets, and manufacturability on advanced process nodes...

Company: Persimmons
Location: San Jose, CA
Posted Date: 24 Dec 2025

Digital Signal Processing Engineer

, understanding of scan concept and writing DFT friendly RTL. Experience in synthesis, CDC, static timing analysis. Exposure...Broadcom is looking for a digital signal processing engineer. In this highly visible role, you will be designing...

Company: Broadcom
Location: San Jose, CA
Posted Date: 24 Dec 2025
Salary: $120000 - 192000 per year