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Keywords: RTL/Logic Design Engineer, Location: Santa Clara, CA

Page: 1

RTL/Logic Design Engineer

logic design engineer in the Dram Controller IP at AMD's Santa Clara Design Center. You will be working in a fast-paced... PERSON: The ideal candidate for this role is an experienced and detail-oriented logic design engineer...

Posted Date: 08 Oct 2025

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team..., and physical design team to drive the RTL design and microarchitecture of modular network on chip IPs for AMD Data Center silicon...

Posted Date: 17 Dec 2025

CPU Cache Microarchitect/RTL Engineer

Cache Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development... specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing...

Company: Apple
Location: Santa Clara, CA
Posted Date: 31 Oct 2025

CPU Power Management Microarchitect/RTL Engineer

, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power... management solutions. Description As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the...

Company: Apple
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU ML Microarchitect/RTL Engineer

Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification... • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU front-end... and/or out-of-order subsystem for our performant cores. Description As a CPU Microarchitect/RTL Engineer, you will own...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU ML Microarchitect/RTL Engineer

Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification... • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

RISCV CPU Systems Architecture/RTL Engineer – Senior Level

understanding of logic design principles, including timing and power implications Preferred Qualifications Master's degree... with scripting languages such as Perl or Python Roles and Responsibilities As a CPU Systems Architecture/RTL Engineer...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 15 Oct 2025

ASIC Design Engineer, GPU/ML Shader Core

of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. Exposure to Digital systems... your career. THE ROLE: We are looking for a ASIC Design Engineer, GPU/ML Shader Core who are motivated to challenge the status...

Posted Date: 19 Dec 2025

Senior Circuit Design Engineer

, etc..) is a plus. Experience with RTL, logic synthesis and verification is a plus. Mixed signal circuit design experience...We are now looking for a Senior Circuit Design Engineer! NVIDIA has been redefining computer graphics, PC gaming...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Dec 2025

ASIC Clocks Design Engineer - New College Grad 2025

. Experience in RTL design (Verilog), verification and logic synthesis. Strong coding skills in python or other industry-standard... of timing closure to innovate and implement new Clocking topologies in RTL. Collaborate with Physical design and timing team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025
Salary: $108000 - 184000 per year

Digital IC Principal Design Engineer

. What You Can Expect Oversee a team of engineers to develop and verify RTL design for CPU subsystems, co-processor/accelerator..., and enhancing the current IP. Responsibilities include: Define VLSI architecture. Implement RTL design. Verify design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Dec 2025
Salary: $146850 - 220000 per year

FPGA Design Engineer

an experienced FPGA Design Engineer with strong expertise in Xilinx Zynq SoC/MPSoC platforms and practical experience in camera... and supporting hardware bring-up for new boards. Key Responsibilities FPGA & Zynq Development Design and implement FPGA logic...

Location: Santa Clara, CA
Posted Date: 28 Nov 2025
Salary: $124000 - 171000 per year

ASIC Design Engineer - New College Grad 2025

We are now looking for an ASIC Design Engineer! NVIDIA has been transforming computer graphics, PC gaming... and see how you can make a lasting impact on the world. Join NVIDIA as an ASIC Design Engineer, influencing product lines spanning...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Nov 2025
Salary: $96000 - 161000 per year

Senior ASIC Design Engineer

We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA... design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

GPU Design Engineer - Memory Hierarchy

! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade... help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025
Salary: $126800 - 190900 per year

CPU Physical Design Engineer

design. Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS... design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals • Will be responsible...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Design Timing Engineer

. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include... of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, and logic equivalence...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025