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Keywords: CPU Physical Design Engineer, Location: Santa Clara, CA

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CPU Physical Design Engineer

design. Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS... groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Physical Design Methodology and Optimization Engineer

with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions... groundbreaking Apple products! In this highly visible role as a part of an industry-recognized and innovative CPU design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Physical Design Methodology and Optimization Engineer

with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions... groundbreaking Apple products! In this highly visible role as a part of an industry-recognized and innovative CPU design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 05 Nov 2025

CPU Design Timing Engineer

. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include... to improve analysis flows and engineer efficiency. • Work extensively with CPU micro-architects and Implementation engineers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Design Timing Engineer

. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include... to improve analysis flows and engineer efficiency. • Work extensively with CPU micro-architects and Implementation engineers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Power Management Microarchitect/RTL Engineer

, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power... management solutions. Description As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the...

Company: Apple
Location: Santa Clara, CA
Posted Date: 31 Oct 2025

CPU Cache Microarchitect/RTL Engineer

-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can...

Company: Apple
Location: Santa Clara, CA
Posted Date: 31 Oct 2025

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU front-end... and/or out-of-order subsystem for our performant cores. Description As a CPU Microarchitect/RTL Engineer, you will own...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU ML Microarchitect/RTL Engineer

engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac We are looking for an experienced engineer to drive...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU ML Microarchitect/RTL Engineer

engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac We are looking for an experienced engineer to drive...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Gate Level Synthesis Engineer

design, RTL synthesis, and physical design Preferred Qualifications The ideal candidate should ideally possess CPU... groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is looking for a hardworking engineer for our CPU Gate Level...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Clock Implementation Engineer

Implementation Engineer, you will be driving the planning, design, implementation, and analysis of clock. Description As a CPU..., and physical implementation • Work on clock analysis • Engage on physical design of blocks • Scripting to automate tasks...

Company: Apple
Location: Santa Clara, CA
Posted Date: 18 Oct 2025

CPU Microarchitect/RTL Engineer

engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Oct 2025
Salary: $126800 - 190900 per year

RISCV CPU Systems Architecture/RTL Engineer – Senior Level

microarchitecture techniques Knowledge of high-performance design strategies and trade-offs in CPU microarchitecture Experience... with scripting languages such as Perl or Python Roles and Responsibilities As a CPU Systems Architecture/RTL Engineer...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 15 Oct 2025

CPU Integration CAD Engineer

cross-functional teams such as CPU physical design, CPU and SOC Integration, Technology and Central CAD Develop... of other Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV Experience with advanced...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 04 Oct 2025

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU... future of computing. What you'll be doing: As a member of our CPU team, you'll be a liaison between Logic design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Nov 2025

ASIC Clocks Design Engineer - New College Grad 2025

the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. Improve Power, Performance, and Area... ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $108000 - 184000 per year

Senior ASIC Design Engineer – Clocks IP

the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. Improve Power, Performance, and Area... ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025