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Keywords: Silicon Power Analysis and Optimization Engineer, Location: San Jose, CA

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Silicon Power Analysis and Optimization Engineer

We are seeking a power optimization engineer who has expertise in power optimization methodology to analyze and optimize pre-silicon...Hybrid Role in San Jose, CA TOP MUST HAVE SKILLS: 1) Extensive power optimization experience in low power ASIC...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 26 Sep 2025

Silicon Power Analysis and Optimization Engineer

We are seeking a power optimization engineer who has expertise in power optimization methodology to analyze and optimize pre-silicon...Hybrid Role in San Jose, CA TOP MUST HAVE SKILLS: 1) Extensive power optimization experience in low power ASIC...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 25 Sep 2025

Post Silicon Validation Engineer

fast. Post Silicon Validation Engineer Mission: drive and yield, quality & reliability for the most advanced... Root cause analysis and RMA processing Mentor Junior Engineers when the project need arises Experience in Post Silicon...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

Senior Performance and Power Profiling Engineer

of results and conditions. 1 (7) Building end to end power profiling scripts for analysis. (8) Contributing use case power.... (B) Use case/component/algo power profiling reports (C) Prototype demos (D) Power/performance analysis, recommended...

Company: Quest Global
Location: San Jose, CA
Posted Date: 27 Sep 2025

System Architect for High Power Applications

on developing power system designs, application circuits and system modules utilizing Gallium Nitride (GaN) and Silicon Carbide (SiC...) power devices. We are looking for a highly experienced engineer with a strong background in GaN and SiC based power...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 13 Jul 2025

Senior Staff Firmware Engineer

, optimization, and validation of latency‑critical paths (e.g., LPU DMA, interrupt latency, power‑state transitions). Implement... fast. Senior Staff Firmware Engineer Mission: Own the end‑to‑end development of low‑level firmware that brings Groq...

Company: Groq
Location: San Jose, CA
Posted Date: 04 Oct 2025

Principal Engineer, eFPGA Place and Route

suite (optimization, place and route, bitstream), reporting (area, timing, power) and debug capabilities. This software... optimization Congestion & timing-aware routing Static timing analysis with support for common SDC syntax Bitstream generation...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 02 Oct 2025

Systems Software Engineer

Software Engineer you will: Fine tune Linux/Android system software for performance and power optimization Conduct hands... in system software engineering, with a strong focus on performance and power optimization for Linux/Android embedded systems...

Posted Date: 18 Sep 2025
Salary: $160000 - 180000 per year

Principal R&D Engineer - PowerArtist

automation to silicon IP, to system design and multiphysics simulation and analysis. We partner closely with our customers...-for-power platform of choice of all leading low-power semiconductor design companies for early RTL power analysis and reduction...

Company: Ansys
Location: San Jose, CA
Posted Date: 30 Aug 2025

Principal FPGA Product Design Engineer

_ THE ROLE: The job role will be responsible for advanced silicon technology evaluation, design enablement, product.... THE PERSON: The ideal candidate must be familiar with advanced silicon technologies including manufacturing process...

Posted Date: 17 Sep 2025

Systems Hardware Engineer

hardware solutions that power Cisco's most critical products. Your Impact You will help shape next-generation system... technologies by driving advanced simulation, experimental validation, and cross-functional optimization. Working closely...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 12 Sep 2025

Principal Advanced Packaging Technology Engineer

with major EDA tools for 3DIC product/package design, physical verification, signal/power integrity analysis, reliability... advanced packaging technology and drive system-technology co-optimization (STCO) of FPGA and ASIC products at advanced nodes...

Posted Date: 02 Aug 2025

Principal Engineer Systems Design/Arch

power optimization techniques. Pre-Si design verification of MAC layer using scripting languageslike TCL/python... role you will: Design, analysis, development & maintenance of WLAN L-MAC FW incustom assembly. Design/Enhance system...

Company: Infineon
Location: San Jose, CA
Posted Date: 16 Jul 2025