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Keywords: Senior RTL Design Engineer, Location: San Jose, CA

Page: 1

Senior SoC RTL Design Engineer (remote)

Senior RTL Design Engineer Remote / work from any US location MUST be a US Citizen or US Permanent Resident Full...-V architecture Logic synthesis and static timing analysis Modeling SoC architectures with FPGAs RTL Design including HVLs and HDLs...

Location: San Jose, CA
Posted Date: 17 Feb 2026

Senior RTL Design Engineer

with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication... systems Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors...

Posted Date: 19 Feb 2026

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer - Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer – Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

ASIC/SoC Design Engineer, RTL design for SoC IPs

products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture... record with 2+ production ASIC tape-outs in senior design roles Expert-level Verilog RTL coding skills with deep...

Posted Date: 21 Feb 2026

ASIC/SoC Design Engineer, RTL design for SoC IPs

for next-generation embedded products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro... your career. ASIC DESIGN ENGINEER THE ROLE: Join AMD's Silicon Design team to design and develop cutting-edge IPs...

Posted Date: 08 Feb 2026

Lead RTL Design Engineer

with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication... BIST etc.) Experience with various Emulation systems Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design...

Posted Date: 14 Feb 2026

Senior SoC Design Verification Engineer (remote)

Senior/Staff or Principal SoC Design Verification Engineer Remote / work from any US location US Citizen... with the RTL team Develop and execute verification plans for digital designs using SystemVerilog and UVM Create and maintain...

Location: San Jose, CA
Posted Date: 19 Feb 2026

Senior Silicon Design Engineer

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: We are seeking a highly motivated and experienced Senior Silicon... Design Engineer to join our AECG SIT team. This role involves leading and contributing to the design, integration...

Posted Date: 14 Jan 2026

AI Silicon Design Engineer

your career. THE ROLE: We are looking for an adaptive, self-motivated senior silicon design engineer to join our growing... and are eager to learn and take on new problems. KEY RESPONSIBILITIES: Digital design implementation and micro-architecture RTL...

Posted Date: 16 Jan 2026

IP Design Engineer

your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 16 Jan 2026

Senior Engineer, GPU Performance Architect (PPA)

of people around the world. Come build with us! Role and Responsibilities As a Senior Engineer, GPU Architect, you will work.... In this mid-to-senior individual contributor role, you will contribute to the performance strategy and guide architectural...

Company: Samsung
Location: San Jose, CA
Posted Date: 31 Jan 2026

Senior Engineer, GPU Modeling Architect

of people around the world. Come build with us! Role and Responsibilities As a Senior Engineer, GPU Modeling Architect..., you will work on the design and development of high-performing functional models that shape next-generation Samsung GPUs...

Company: Samsung
Location: San Jose, CA
Posted Date: 31 Jan 2026

Senior 5G/LTE Protocol & Certification Engineer

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Feb 2026

Senior 5G/LTE Protocol & Certification Engineer

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 18 Feb 2026

Senior ASIC DV Engineer

metrics from specifications and writing block and chip-level tests. Debugging RTL and Gate simulations and work with design... and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip...

Company: Broadcom
Location: San Jose, CA
Posted Date: 18 Feb 2026

Senior ASIC Engineer - SDC

to first customer shipments. Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep... and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design or block or top...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 26 Jan 2026

Senior Software Applications Engineer

and timing closure. Preferred skills include simulation, scripting, and RTL design experience. Experience with Lattice FPGA... as a subject matter expert for FPGA design flows, assisting customers and internal teams. Preferred Qualification (Requirements...

Location: San Jose, CA
Posted Date: 23 Feb 2026

Senior System Power Architect

Engineer is responsible for the design and analysis of low-power hardware and software systems. This includes low-power FPGA... Lattice may well be just what you're looking for. Responsibilities & Skills Responsibilities: The Senior System Power...

Location: San Jose, CA
Posted Date: 21 Dec 2025
Salary: $175000 - 219000 per year

Principal Static Timing Analysis (STA) Engineer

as a technical lead on STA Define and review physical design methodologies and best practices. Mentor and guide junior and senior... PD engineers. Lead design reviews and tape-out readiness. Cross-Functional Collaboration Partner with RTL...

Location: San Jose, CA
Posted Date: 20 Feb 2026