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Keywords: RTL Engineer Lead, Location: Santa Clara, CA

Page: 1

RTL Engineer Lead

seeking a RTL Engineer to join our growing team in the United States. Role: RTL Engineer Lead Location: Sunnyvale..., CA (onsite) About the Role Role Overview: We are looking for a highly skilled RTL Design Engineer to join our hardware...

Company: Qualitest
Location: Santa Clara, CA
Posted Date: 27 Nov 2025
Salary: $140000 - 160000 per year

Staff Machine Learning Engineer, LLM Fine-Tuning (Verilog/RTL Applications) - NJ

Staff Machine Learning Engineer, LLM Fine-Tuning (Verilog/RTL Applications) Level: Staff Location: San Jose..., refactoring, lint explanation, constraint translation, and spec-to-RTL assistance. You’ll lead a small, high-leverage team focused...

Company: NavitsPartners
Location: Santa Clara, CA
Posted Date: 04 Dec 2025

AI/ML Design Verification Methodology Lead Engineer

: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies... and IOT devices architectures. The successful candidate will also lead a team of verification engineers and collaborate...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Design Verification Lead

your career. THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team..., and tests using System Verilog and UVM Debug RTL simulations and work with HW and FW development teams to verify fixes Review...

Posted Date: 09 Oct 2025

Sr. Staff Verification Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Sr. Staff Engineer..., you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025
Salary: $124420 - 186400 per year

Product Engineer - Tessent DFT

as Product Engineer, specializing in design-for-test (DFT). Tessent is the market and technology leader of automated tools... IC design flows Lead beta programs and support beta partners Drive product adoption Create and deliver in-depth...

Company: Siemens
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $129600 - 233300 per year

Principal Mixed Signal Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Marvell...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $165630 - 248100 per year

Senior Staff Physical Verification CAD engineer - EDA Tools

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact We are seeking a highly skilled... and experienced Senior Staff Level Physical Verification CAD Engineer to join our dynamic team. The ideal candidate will have a deep...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Dec 2025
Salary: $124420 - 186400 per year

Digital IC Principal Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal... Engineer at Marvell, you will be a member of the Custom Compute Solution IP development team. This team develops uniquely high...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Dec 2025
Salary: $146850 - 220000 per year

Senior Circuit Design Engineer - Power Modeling and Simulation

as a leader in this next wave of computing. We are now looking for a motivated Senior Circuit Design Engineer in Power Modeling..., performance, and stability of the designs. Be a mentor/technical lead for junior team members. What we need to see: BSEE...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Nov 2025

Senior Principal Digital IC Design Engineer

for subsystems and IP blocks. Lead RTL development and integration, ensuring modularity, reusability, and compliance with design..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Principal Digital IC...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Nov 2025

Digital IC design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff... Engineer with Marvell, you’ll be a member of the Custom compute and solutions group. Our design team works on state-of-the-art...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Nov 2025
Salary: $121400 - 181800 per year

Digital, Mixed Signal IC Design Engineer, Principal

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal... Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2025
Salary: $146850 - 220000 per year

Sr Principal Hardware Security Engineer

Job Category: Information Security Engineer Job Description: Department Description As part of the Oracle... Our organization is looking for a highly motivated, dedicated Senior Principal Engineer to run security architecture within a hardware...

Company: Oracle
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

Principal Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise.... You will work with both local and global team members on the physical design of complex chips and lead the development of advanced...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $146850 - 220000 per year

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the following... responsibilities: • Work closely with architecture and RTL designers on verifying the functionality correctness of the design • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the... responsibilities as follows: • Work closely with architecture and RTL designers on verifying the functionality correctness of the...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $126800 - 190900 per year

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the following... responsibilities: • Work closely with architecture and RTL designers on verifying the functionality correctness of the design • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Oct 2025

Senior Circuit Design Engineer

We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence... the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025