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Keywords: Design Verification Lead, Location: Santa Clara, CA

Page: 1

Design Verification Lead

are the same. Role: Lead - SoC/Sub-System Design Verification Location is Sunnyvale CA. About the Role We are seeking... an experienced Design Verification Lead to drive SoC-level verification strategy, lead high-performing teams, and ensure first-time...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 26 Feb 2026
Salary: $86900 - 203800 per year

Lead Design Verification Engineer

Job Details: Job Description: Job Description Intel is seeking a highly technical Lead Design Verification Engineer... to SoC-level verification - Design and implement advanced verification environments, tools, and testplans enabling first-pass...

Company: Intel
Location: Santa Clara, CA
Posted Date: 26 Feb 2026

Design Verification Engineer - ASIC/UVM/SystemVerilog

Azure, and Oracle. THE PERSON: We are seeking a high-impact MTS Design Verification Engineer with strong technical depth... to ensure high-quality deliverables. Participate in design reviews, micro-architecture definition, and bring a verification...

Posted Date: 12 Feb 2026

VLSI Design Verification Engineer

Job Description: VLSI Design Verification Engineer Technical Lead I – VLSI Who We Are: Born digital, UST... · Typically 8+ years of experience in VLSI design verification (can be tailored for Junior, Senior, or Lead roles) Compensation...

Company: UST
Location: Santa Clara, CA
Posted Date: 07 Feb 2026
Salary: $87000 - 131000 per year

Design Verification Engineer

and Accelerated Compute SOCs and IPs Develop verification test plan based on architecture and design specifications Gain... and resolve issues working with design and verification team members Run periodic regressions, triage failures, and resolve...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Feb 2026
Salary: $96570 - 144600 per year

Senior Design Verification Engineer

: As a Senior Design Verification Engineer, you will contribute to ASIC verification efforts for IPs, subsystems, and SoCs used... IPs to SoC product teams Required Skillset 3+ years of practical ASIC design verification experience, including...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 06 Feb 2026
Salary: $126700 - 190100 per year

Principal Design Verification Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Custom Solutions develops..., advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Feb 2026
Salary: $158600 - 237600 per year

Design Verification Engineer

your career. THE ROLE: We are looking for an experienced DDR Verification Expert to join our team as a Technical Lead... team around you. KEY RESPONSIBILITIES: Technical Leadership & Project Oversight: Lead and guide a team of verification...

Posted Date: 28 Jan 2026

Director for Design Verification

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As part of the Design Verification... of experience. Strong understanding of ASIC development process. Proven record as Verification Lead on Complex ASIC SOCs...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Jan 2026

Design/DSP/Verification Intern - Bachelor's Degree

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell's Design, DSP... As a Design/DSP/Verification Intern, you could: Develop and maintain Python-based test suites for system bring-up Execute...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 18 Dec 2025
Salary: $27 - 53 per hour

Design/DSP/Verification Intern - PhD Degree

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Data Communication Architecture... field(s) Strong fundamental DSP/Communication theory & system design knowledge DSP knowledge Data Communication theory...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Feb 2026
Salary: $28 - 56 per hour

Lead CPU Firmware Verification and Validation Engineer/ Manager

to lead a global, multi-role team responsible for verification and validation of complex software and firmware platforms..., SDKs, and more. We are seeking a highly skilled and dynamic Software and Firmware Verification and Validation Manager...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

Distinguished Engineer, Verification

Looking For Strong design knowledge and experience in setting up verification environments, developing testplan, bring up design..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Custom Solutions develops...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 24 Feb 2026

Infinity Fabric Verification Staff Engineer

execution of silicon design and verification closure. KEY RESPONSIBILITIES: Create project schedules and staging plans... deep expertise in the Infinity Fabric architecture. Lead a team of verification engineers to execute in the verification...

Posted Date: 24 Feb 2026

Systems Verification Engineer

: Design and lead test method and equipment development, production, and qualification projects. Work closely with Systems, R... of Companies, is currently recruiting for a Systems Verification Engineer, located in Santa Clara, CA. Robotics & Digital...

Location: Santa Clara, CA
Posted Date: 22 Feb 2026
Salary: $87000 - 140300 per year

Verification Engineer - UVM / ASIC

your career. THE ROLE: We are currently looking for Verification Engineer who will be involved in all aspects of AMD... comprehensive test plans to ensure coverage closure. The position allows exposure to all aspect of ASIC design stages...

Posted Date: 18 Feb 2026

Senior Staff Physical Verification CAD engineer - EDA Tools

understanding of the physical verification process in the context of semiconductor design and manufacturing. This role involves... for internal design tools group. Support tape-out and design-related foundry interface activities, physical verification CAD flow...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Dec 2025
Salary: $124420 - 186400 per year

Lead Analog SerDes Architect/Design Engineer

from 400G today to 1.6T+ tomorrow. We are seeking a Lead Analog SerDes Architect / Design Engineer to join our team and shape... design flow Experience with full-chip designs, ESDs and verification flows. Preferred Qualifications Familiarity...

Company: Intel
Location: Santa Clara, CA
Posted Date: 03 Dec 2025

Senior PIC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As Generative AI continues... solutions. What You Can Expect In this role, you will be a key part of the team responsible for the design and layout...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Feb 2026
Salary: $113900 - 168500 per year

Digital Design Engineer, Principal

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Switch Business Unit in Marvell.... We develop the architecture, collaborate on IP development, create the physical design, and work with the world’s leading AI data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 20 Feb 2026