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Keywords: Verification Engineer - UVM / ASIC, Location: Santa Clara, CA

Page: 1

Verification Engineer - UVM / ASIC

your career. THE ROLE: We are currently looking for Verification Engineer who will be involved in all aspects of AMD... requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Proficient in debugging firmware and RTL code...

Posted Date: 18 Feb 2026

Design Verification Engineer - ASIC/UVM/SystemVerilog

Azure, and Oracle. THE PERSON: We are seeking a high-impact MTS Design Verification Engineer with strong technical depth..., ownership, and the ability to drive verification closure on complex, high-performance ASIC designs. The ideal candidate brings...

Posted Date: 12 Feb 2026

ASIC Clocks Verification Engineer - New College Grad 2026

is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team... with other architects, ASIC designers and verification engineers to verify high frequency clock structures. Be able to engage...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Feb 2026
Salary: $116000 - 189750 per year

Senior ASIC Design Verification Engineer

Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet... years experience in ASIC design verification Demonstrated success in taking multiple ASIC products from concept to mass...

Location: Santa Clara, CA
Posted Date: 31 Jan 2026

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two.... As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Dec 2025

Senior ASIC Design Verification Engineer

NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world... level verification. Proficiency with Object Oriented Programming, System Verilog, Verilog, UVM, SVA and Functional...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Dec 2025

Senior ASIC Verification Engineer

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience... verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc. Exposure on block level and system-level...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Low Power ASIC Engineer - New College Grad 2026

world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2026. We continue... is needed Must be fluent in Verilog, SystemVerilog, and understanding of UVM. Ways to stand out from the crowd: Prior knowledge of Low...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Feb 2026
Salary: $100000 - 166750 per year

Custom SOC IP Verification Engineer

a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI... test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments. Design and implement...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Feb 2026

Design Verification Engineer

libraries like UVM 10+years of ASIC design verification experience Experience / Background with DDR or Memory Controller. PHY...-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team...

Location: Santa Clara, CA
Posted Date: 18 Feb 2026

Senior Verification Engineer, SoC

NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality of the world...++, Object-Oriented Programming, UVM, System Verilog. Familiarity with verification challenges in large-scale builds. Solid...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Feb 2026

Senior Design Verification Engineer

: As a Senior Design Verification Engineer, you will contribute to ASIC verification efforts for IPs, subsystems, and SoCs used... IPs to SoC product teams Required Skillset 3+ years of practical ASIC design verification experience, including...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 06 Feb 2026
Salary: $126700 - 190100 per year

Senior Design Verification Engineer

and system level. Experience using SystemVerilog and UVM. Strong experience in ASIC design verification flows and DV...Title: Senior Design Verification Engineer Location: On-site in Santa Clara, CA Job Type: Full-Time Why join Client...

Company: InterSources
Location: Santa Clara, CA
Posted Date: 31 Jan 2026

Infinity Fabric Verification Engineer

verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working... in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ Developing UVM based verification...

Posted Date: 30 Jan 2026

Senior Memory Controller Verification Engineer

like Debussy, GDB). Background with System Verilog and UVM based methodology for ASIC verification. Ways to stand out from the...NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Custom SOC IP Verification Engineer

a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI... test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments. Design and implement...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

IP Design Verification Engineer

your career. THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team... and environments Provide technical support to other teams PREFERRED EXPERIENCE: Proficient in IP level ASIC verification...

Posted Date: 25 Dec 2025

GPU Design Verification Engineer

and strong programming skills in System Verilog, OVM and UVM Hands on verification experience working on ASIC, CPU or GPU Test Plan...Job Details: Job Description: Performs functional verification of graphics logic components, including 3D graphics...

Company: Intel
Location: Santa Clara, CA
Posted Date: 22 Feb 2026

GPU Design Verification Engineer

, OVM and UVM Hands on verification experience working on ASIC, CPU or GPU Test Plan development experience at IP level...Job Details: Job Description: Performs functional verification of graphics logic components, including 3D graphics...

Company: Intel
Location: Santa Clara, CA
Posted Date: 15 Feb 2026

GPU Design Verification Engineer

and strong programming skills in System Verilog, OVM and UVM Hands on verification experience working on ASIC, CPU or GPU Test Plan...Job Details: Job Description: Performs functional verification of graphics logic components, including 3D graphics...

Company: Intel
Location: Santa Clara, CA
Posted Date: 15 Feb 2026