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Keywords: IP Design Verification Engineer, Location: Santa Clara, CA

Page: 2

Digital IC Principal Design Engineer

functionality. Collaborate with verification engineer to develop exhaustive test cases to ensure successful design. Work closely... Engineer at Marvell, you will be a member of the Custom Compute Solution IP development team. This team develops uniquely high...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Dec 2025
Salary: $146850 - 220000 per year

FPGA Design Engineer

an experienced FPGA Design Engineer with strong expertise in Xilinx Zynq SoC/MPSoC platforms and practical experience in camera... and integrate custom IP cores and AXI interfaces. Implement HW-SW co-design using ARM processors on Zynq SoCs. Implement xDMA...

Location: Santa Clara, CA
Posted Date: 28 Nov 2025
Salary: $124000 - 171000 per year

Memory PHY RTL Design Engineer

your career. THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware..., complex processor architecture, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 13 Nov 2025

RTL Design Engineer - Intermediate

to architecture, design, and documentation for Ips. RTL Development: Design, verify, and validate high-performance logic using System..., Ethernet, and DDR5/6. System Level Integration: Utilize the client (Xilinx) Vivado and Vitis ecosystems to integrate custom IP...

Company: Cynet Systems
Location: Santa Clara, CA
Posted Date: 09 Feb 2026
Salary: $53.62 - 58.62 per hour

ASIC/RTL Design Engineer

Design. Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging...Duration: 6 months Job Duties: The work will expose the designer to a number of IP including ARM cores, Ethernet...

Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Design Engineer - Sensors

devices. Job activities span the ASIC design process from specification definition, high-level design, coding and verification... and route, timing and power use, and verification or similarly for custom circuit design/layout flow. • Utilizes tools...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 18 Jan 2026

Senior ASIC RTL Design Engineer

. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design... processor architecture, digital design as well as verification/design quality. You are a team player who has excellent...

Posted Date: 26 Dec 2025

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team... and design Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets...

Posted Date: 17 Dec 2025

Senior Principal Engineer, Physical Design

experience in back-end physical design and verification, including significant leadership roles Proven track record of leading... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Dec 2025

Analog Design Engineer

and timing analysis, and reliability checks. Interface with cross-functional teams like RTL, Verification and Physical Design... of key IP in Digital and Analog/Mixed-Signal domains catering to AMD products across multiple business units. With a good mix...

Posted Date: 09 Dec 2025

Senior Staff Engineer, Physical Design

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year

Senior Layout Mask Design Engineer

of our next generation custom SRAM design. As part of the Digital IP Team, you will work with other team members on the new process design... and verifying against design rules and schematics. Perform power robustness check and EMIR verification and fixes Negotiation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025
Salary: $124000 - 195500 per year

Senior SRAM Circuit Design Engineer

. We are looking for you. You will work on the design and development of our next generation of custom SRAM design. As part of the Digital IP Team, work..., and develop in-house design and verification flows for SRAM design that would be used on all the NVIDIA products. What you'll...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

FPGA Prototyping Engineer

: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who.../HAPS platforms across AMD’s next-generation silicon programs. You will collaborate closely with architecture, RTL design...

Posted Date: 04 Feb 2026

Formal Equivalence Checking Methodology Engineer

performance bottlenecks Provide training and support to IP teams on formal verification methodologies, tools, and standard... Formal Equivalence Checking Methodology Engineer to join our VLSI team. This team is responsible for developing, maintaining...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 28 Jan 2026

Electronics & Semiconductor Engineer

are the same. Job Description About the Job You're Considering We're seeking an Electrical Design Engineer... where you'll contribute to the design, development, and optimization of mission-critical systems used by global enterprises...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 17 Jan 2026
Salary: $58900 - 130000 per year

GPU Next-Gen Architecture Modeling Engineer

features, to improve the graphics architecture. The AM Engineer is responsible for the gathering of requirements, design... initiative, where we have a faster functional model and driver stack to facilitate our architecture analysis and IP verification...

Posted Date: 17 Jan 2026

Senior Staff Applications Engineer

a highly skilled and experienced Senior Staff Applications Engineer specializing in SerDes IP design and application. This role... support during the design, development, and deployment phases, ensuring successful implementation of SerDes IP solutions...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jan 2026
Salary: $121400 - 181800 per year

Principal Applications Engineer

a highly skilled and experienced Principal Applications Engineer specializing in SerDes IP DSP algorithms and mixed-signal... circuit design. This role is critical in driving the successful integration and application of Marvell’s SerDes IP...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jan 2026
Salary: $143200 - 214500 per year