, Bachelor's degree in CS/EE is required. 1+ years of relevant experience in ASIC design field. Solid ASIC/FPGA design (micro... Good verbal/written communication skills and teamwork Good knowledge of ASIC design flow/tools, with backend knowledge...
Principal ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation... Engineer to join our team. In this role, you will play a key part in verifying cutting-edge ASIC/SoC designs for networking...
Principal ASIC Verification Engineer This role has been designed as ‘’Onsite’ with an expectation... Engineer to join our team. In this role, you will play a key part in verifying cutting-edge ASIC/SoC designs for networking...
ASIC Verification Engineer This role has been designed as 'Hybrid' with an expectation that you will work... on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company...
ASIC Design Engineer Staff This role has been designed as 'Hybrid' with an expectation that you will work... on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company...
ASIC Engineer Sr Staff This role has been designed as 'Hybrid' with an expectation that you will work on average 2... Design-for-Test (DFT) Engineer to join our team and contribute to the development of advanced 3nm and beyond networking...
ASIC Engineer 3 This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days... ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage...
ASIC Verification Engineer This role has been designed as ‘Hybrid’ with an expectation that you will work... on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company...
ASIC Design Engineer Staff This role has been designed as ‘Hybrid’ with an expectation that you will work... on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company...
ASIC Engineer Sr Staff This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2... Design-for-Test (DFT) Engineer to join our team and contribute to the development of advanced 3nm and beyond networking...
ASIC Engineer 3 This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2 days... ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage...
Hybrid Role in San Jose, CA TOP MUST HAVE SKILLS: 1) Extensive power optimization experience in low power ASIC... design 2) Proficiency in RTL design languages like Verilog or VHDL 3) Proficiency in programming languages like Perl...
Hybrid Role in San Jose, CA TOP MUST HAVE SKILLS: 1) Extensive power optimization experience in low power ASIC... design 2) Proficiency in RTL design languages like Verilog or VHDL 3) Proficiency in programming languages like Perl...
Company Description https://wd5.myworkdaysite.com/en-US/recruiting/microchiphr/External/job/Technical-Staff-Engineer...-functional teams to deliver high-performance IP integrations into Microchip FPGA products Work on ASIC & FPGA IP development...
IT Engineer About Etched Etched is building AI chips that are hard-coded for individual model architectures... deep & parallel chain-of-thought reasoning agents. Job Summary At Etched, every role is critical, but as an IT Engineer...
Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading... to efficiency improvements for our design team. RESPONSIBILITIES: Overall design responsibility for ASIC package designs...