ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're... in ASIC/SOC RTL2GDSII physical design and signoff flows Strong experience with industry standard EDA tools including...
ultimate goal of enabling human life on Mars. SR. SOC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're... engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space...
ultimate goal of enabling human life on Mars. SR. SOC/ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging... of experience in semiconductor Design For Test (DFT) engineering, post-silicon validation, and/or production testing PREFERRED...
ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging... crossings and power optimization ASIC/SoC system integration experience Experience with multicore CPU subsystem design...
ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging... crossings and power optimization ASIC/SoC system integration experience Experience with multicore CPU subsystem design...
ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging... crossings and power optimization ASIC/SoC system integration experience Experience with multicore CPU subsystem design...
ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're... engineering or computer science 5+ years of ASIC and/or physical design flow development experience in industry PREFERRED...
- Experience with modern ASIC/FPGA design and verification tools - Experience with SOC bring-up and post-silicon validation... CMOS generation technologies. Basic Qualifications - 8+ years of ASIC implementation, synthesis, STA and physical...
- Master's degree or Ph.D. degree in Electrical Engineering or related field - Experience with modern ASIC/FPGA design... CMOS generation technologies. Basic Qualifications - 8+ years of ASIC implementation, synthesis, STA and physical...
with front end design teams to address timing, power and congestion challenges Deliver a synthesized netlist to ASIC BE vendor..., and collaborate with vendor to address physical design tradeoffs Work with DFT and architecture teams to develop timing constraints...
/performance/area (PPA) trade-offs Integrate and validate ISP data paths based on PRD, design specifications, and overall SoC... Work with physical design teams on floor planning, timing closure, and DFT implementation Perform full-chip integration...