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Keywords: Serdes PHY Analog Design Engineer, Location: Bangalore, Karnataka

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Serdes PHY Analog Design Engineer

Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver Applicants: Qualcomm is an equal... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 22 Nov 2025

Serdes PHY Analog Design Engineer

Design, Rx, Tx, PLL, SerDes, PHY, Serializer, Deserializer, VCO, High-speed Trans receiver Applicants: Qualcomm is an equal... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 22 Nov 2025

ANALOG DESIGN ENGINEER (SerDes/DDR)

your career. ANALOG DESIGN ENGINEER (SerDes/DDR) THE ROLE: This job opening is for a circuit designer in a team responsible... of power-performance trade-offs in high-speed DDR and/or SerDes architectures Direct experience in all phases of design...

Posted Date: 09 Dec 2025

Analog Design Engineer - SerDes

your career. Analog Design Engineer - SerDes THE ROLE: This job opening is for a DDR/Serdes/Analog circuit designer... and ready to take on problems. KEY RESPONSIBILITIES: Complete ownership of individual circuit blocks in a DDR PHY design...

Posted Date: 23 Nov 2025

Analog Design Engineer - High Speed Memory/IO Circuit

your career. Analog Design Engineer - High Speed Memory/IO Circuit THE ROLE: Be part of AMD’s analog/mixed signal IP design... RESPONSIBLITIES: High Speed IO/SerDes AMS circuit architecture and design Lead Definition, review and sign-off on analog/mixed...

Posted Date: 27 Nov 2025

Analog Design Engineer

differentiator. KEY RESPONSIBILITIES: Complete ownership of individual circuit blocks in a SerDes PHY design in cutting edge... of power-performance trade-offs in high-speed SerDes designs Direct experience in all phases of design analysis including...

Posted Date: 20 Nov 2025

Senior Staff Analog Design Engineer

and Storage and ASIC businesses. From industry leading designs of high performance SerDes and PHY, analog front ends to IPs... they meet stringent performance targets. Responsible for design and verification of a complex analog block, work...

Company: Marvell
Posted Date: 18 Oct 2025

High Speed Memory/IO Circuit Lead (Mixed Signal)

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Be part of AMD’s analog/mixed signal IP design team responsible for the... design and development of next generation IOs, high speed memory (gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP...

Posted Date: 19 Nov 2025

STA Synthesis Lead

, and area (PPA) targets on SerDes PHY IPs. THE PERSON: As a senior member of the SerDes IP Physical Design team... your career. SMTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role will involve driving the physical design flow...

Posted Date: 01 Nov 2025