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Keywords: Senior Timing Methodology Engineer, Location: Santa Clara, CA

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Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive..., self-heating, thermal impact, IR drop etc. Collaborate with technology leads, VLSI physical design, and timing engineers...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Timing Methodology Engineer, Custom Circuits

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive.... What You'll Be Doing: Develop Timing sign-off flows, constraints and QOR metrics for custom macro design at transistor level...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Jan 2026

Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer... Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: BS...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Timing Engineer - Circuits

Senior Timing Engineer (Circuits) to join our dynamic and growing Circuit Solutions Group! If you are a highly motivated... timing convergence flows while working with methodology teams. Develop timing models and methodology for innovative...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 15 Jan 2026

Senior Custom Circuits Timing Engineer

Senior Timing Closure Engineer to join our dynamic and growing Circuit Solutions Group! If you are a highly motivated... and improve timing convergence flows working with methodology teams. Develop timing models and methodology for innovative...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Dec 2025

Senior ASIC Timing Engineer

Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great... to improve timing convergence flows in collaboration with methodology teams. What we need to see: BS (or equivalent...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Senior Physical Design Methodology Engineer, Retime Flows

Senior Physical Design Methodology Engineer to solve challenging problems for the next generation technology... assembly and P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Jan 2026

Senior Physical Design Methodology Engineer, PPA Fusion Compiler

Senior Physical Design Methodology Engineer, PPA Fusion Compiler to join our outstanding Networking Silicon engineering team... to formulate and develop with ML-based solutions Participate in developing flow and tool methodologies for P&R, timing analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Senior Physical Design Methodology Engineer, Innovus Flows

engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA... at scale, in the shortest possible time. Your work in physical design methodology directly enables our speed to market...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Implementation Methodology Engineer

and relative area, timing, and power trade-offs Strong understanding of physical design implementation eg: physical synthesis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 04 Dec 2025

SOC IP Methodology Engineer - Custom SOC

Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP... expert, able to traverse from Synthesis to final design closure (timing and layout) involving latest EDA technologies...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Physical Design Methodology Engineer

first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The... RESPONSIBLITIES: Physical design and signoff methodology development for advanced nodes and High performance Automation to improve...

Posted Date: 09 Nov 2025

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior Staff Physical Verification CAD engineer - EDA Tools

and experienced Senior Staff Level Physical Verification CAD Engineer to join our dynamic team. The ideal candidate will have a deep... into an efficient and cohesive design flow, ensuring seamless interoperability and maximizing design productivity. Methodology...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Dec 2025
Salary: $124420 - 186400 per year

Senior Principal Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... Expect As a senior leader in the central physical design team, you will: Shape the long-term vision for physical design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior Staff Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... methodology to enable an efficient and robust design process. This position also provides an exciting platform to engage...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance.... What You Can Expect You will work with a global team on both the physical design of complex chips as well as the methodology...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year

Design Verification Engineer

and other contributions to verification methodology As an overall product owner, responsible for architecture analysis and technical... Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs...

Posted Date: 28 Jan 2026