Senior RTL Design Engineer MUST be a US Citizen Remote / work from any US location Full-time/employee + Bonus... synthesis and static timing analysis Modeling SoC architectures with FPGAs RTL Design including HVLs and HDLs (SystemVerilog...
Senior Design Verification Engineer Remote / work from any US location US Citizen or US Permanent Resident Full-time... Deployment (CI/CD) pipelines DESIGN VERIFICATION GROUP on LinkedIn: #DesignVerification #SoC #UVM...