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Keywords: Senior DFT Design Engineer, Location: San Jose, CA

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Senior DFT Design Engineer

future innovation. As a Senior DFT Design Engineer, you will be responsible for DFT architecture and implementation... the world’s #1 FPGA company! About the Role: The Altera DFT team is looking for a motivated Senior DFT (Design...

Company: Altera
Location: San Jose, CA
Posted Date: 26 Feb 2026

Principal SoC DFT Engineer

Job Category: Applied R&D Degree Level: Bachelor's degree Job Description: The Principal DFT Engineer will work... from RTL/netlist through post-silicon debug. As a senior member of the DFT team, you will work closely with the architecture...

Company: Nokia
Location: San Jose, CA
Posted Date: 04 Mar 2026

Senior Technical Staff Engineer - Design for Test

/External/job/Senior-Technical-Staff-Engineer---Architect--DFT-Lead-_R430-26-1 The DFT lead works in close partnership... on Automatic Test Equipment (ATE). Responsibilities (1.) Manage DFT requirements across architecture, design, and product teams...

Company: Microchip
Location: San Jose, CA
Posted Date: 11 Feb 2026

Senior SoC Design Engineer

skilled digital design engineer with deep expertise in modern processor architectures and SoC development. You thrive... and methodology development. Collaborate closely with architecture, verification, system validation, physical design, and DFT teams...

Posted Date: 05 Mar 2026

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer - Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer – Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

ASIC/SoC Design Engineer, RTL design for SoC IPs

products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture...-for-test (DFT) and design-for-debug (DFD) features; participate in RTL quality reviews and signoff. Physical Design...

Posted Date: 21 Feb 2026

ASIC/SoC Design Engineer, RTL design for SoC IPs

for next-generation embedded products. As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro... your career. ASIC DESIGN ENGINEER THE ROLE: Join AMD's Silicon Design team to design and develop cutting-edge IPs...

Posted Date: 07 Feb 2026

Senior Staff Yield & Product Engineer

's technology. As a Senior Staff Yield & Product Engineer in our Research & Development team, you'll have the opportunity to merge... Improvement, Test-time Reduction, RMA Support, Sustaining, and Manufacturability Partner with Design, DFT/DFM, Process, Packaging...

Company: Infineon
Location: San Jose, CA
Posted Date: 31 Jan 2026

Senior 5G/LTE Protocol & Certification Engineer

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Feb 2026

Senior 5G/LTE Protocol & Certification Engineer

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up... services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design...

Company: Prodapt
Location: San Jose, CA
Posted Date: 18 Feb 2026

Sr. Emulation Engineer - HAPS

, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup. Analog mask layout.... Embedded services: device drivers, RTOS porting, Board bring up. Prodapt is looking for a Senior Emulation Engineer...

Company: Prodapt
Location: San Jose, CA
Posted Date: 05 Mar 2026

Sr. Emulation Engineer - HAPS

, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup.../FPGA and Embedded Software services. Our business model is to offer our services based on turnkey, Offshore design center...

Company: Prodapt
Location: San Jose, CA
Posted Date: 04 Mar 2026

Principal Static Timing Analysis (STA) Engineer

as a technical lead on STA Define and review physical design methodologies and best practices. Mentor and guide junior and senior...Principal Static Timing Analysis (STA) Engineer About the Role: We are seeking a highly experienced Principal STA...

Location: San Jose, CA
Posted Date: 27 Feb 2026

Technical Staff Engineer - Architecture (SOC)

organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design...! Job Description Job Description: Join our dynamic FPGA (Field Programmable Gate Array) Business Unit as a Technical Staff SOC Architecture Engineer. We are at the...

Company: Microchip
Location: San Jose, CA
Posted Date: 11 Feb 2026

Principal Mechanical Engineer- Video Collaboration

Mechanical Engineer to be a senior technical leader and decision-maker on our Video Collaboration product development team... lifecycle (from early concept through mass production) partnering closely with Industrial Design, Product Management, Operations...

Company: Logitech
Location: San Jose, CA
Posted Date: 06 Feb 2026

Application Engineer

Experience in coaching team members and Advantest customers Experience with SSN, PCIe. Understanding of DFT (Design for Test...Job Description: Job Description: As an Application Engineer, you will be working with a dynamic team to provide...

Company: Advantest
Location: San Jose, CA
Posted Date: 04 Feb 2026