Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SOC Design Verification Lead, Location: Bangalore, Karnataka

Page: 3

RTL Design Lead - IP Design

team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC... cutting-edge designs. You will lead a front-end design and integration team, working closely with the architecture, IP design...

Posted Date: 24 Aug 2025

ASIC RTL Design Engineer(Camera) - Sr Lead

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing... Experience in formal verification with Cadence LEC Experience in mobile Multimedia/Camera design is a plus DSP /ISP knowledge...

Company: Qualcomm
Posted Date: 21 Aug 2025

Chip Lead - Technologist Silicon Design Engineer

across architecture, design, verification, and physical design. You’ll collaborate with cross-functional teams, tackle different problems... ideal candidate will have a strong interest in Architecture, Digital Logic Design and Verification, Design for Test...

Posted Date: 19 Jul 2025

Physical Design Engineer, Senior Lead

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...+ year of Hardware Engineering or related work experience. PNR implementation for Qualcomm SoC's Good hands-on experience...

Company: Qualcomm
Posted Date: 25 Sep 2025

Senior Lead RTL Design Engineer

team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP... design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips...

Company: Qualcomm
Posted Date: 24 Aug 2025

Debug IP Design Lead /MicroArchitect

of Debug IPs. The ideal candidate will have a strong background in IP design, verification, and delivery, with specific... your experience in RTL design for complex SoC development using Verilog and/or SystemVerilog to create efficient and reliable IPs...

Company: Qualcomm
Posted Date: 03 Jul 2025

RTL Design Engineer (Peripheral)- Staff

like USB/PCIE/Ethernet preferred. Work closely with the SoC verification and validation teams for pre/post Silicon debug... Verilog, Verilog, C/C++, Perl and Python is a plus Ability to lead a small design team. Minimum Qualifications: • Bachelor...

Company: Qualcomm
Posted Date: 01 Oct 2025

PMTS Silicon Design Engineer

, verification, and physical design teams to ensure DFX requirements are met. Collaborate with SOC design and product engineering... or Manager to lead a Design-for-Test team in developing and implementing advanced DFT IP and design methodologies for complex...

Posted Date: 01 Oct 2025

RTL Design - Peripheral(Sr Staff)

like USB/PCIE/Ethernet preferred. Work closely with the SoC verification and validation teams for pre/post Silicon debug... Verilog, Verilog, C/C++, Perl and Python is a plus Ability to lead a small design team. Minimum Qualifications: • Bachelor...

Company: Qualcomm
Posted Date: 28 Sep 2025

RTL DESIGN ENGINEERING / IP Logic Design Engineer (Mid to Senior Level)

first we need 15 + LEAD person then followed by other Levels pls... KEY NOTES: RTL DESIGN ENGINEERING This role... is for an experienced RTL Design Engineer to develop and implement complex digital designs for networking solutions. Key responsibilities...

Company: Cloudious
Posted Date: 25 Sep 2025

Technical Director, Physical Design

design capabilities and infrastructure in alignment with company-wide technology strategy. • Lead RTL-to-GDSII implementation... for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing...

Company: Marvell
Posted Date: 24 Sep 2025

CPU/Core/Processor RTL Design Architect

as well as verification/design quality. You are a leader and team player who has excellent communication skills... crossing, Linting aspects of the overall design of the IP and the subsystem. Work closely with DFT, Physical Design and SOC...

Posted Date: 14 Sep 2025

GPIO Circuit Design Engineering Manager

. For more information, visit www.gf.com. Job Summary: The GPIO Manager will lead the design, development, and delivery of GPIO IP blocks..., design, verification, physical design, and product engineering teams to ensure high-quality, robust, and scalable...

Posted Date: 10 Sep 2025

Technical Program Manager – Physical Design

and detail-oriented Physical Design Program Manager to lead and drive execution across complex ASIC/SoC development programs... Manager (TPM) will lead all block/chip level Physical Design (PD) activities, from floor planning to layout verification...

Company: Nvidia
Posted Date: 07 Sep 2025

Serdes PHY Analog Design Engineer

, Jitter sources and modeling (RJ & DJ) Ability to take a design, perform schematic to post layout verification, integration... sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY...

Company: Qualcomm
Posted Date: 03 Sep 2025

Senior Staff Power Design Engineer

Supply integrity checks Low Power design & Signoff Work on complete SoC design cycle of ASICs, starting from Architecture... nodes across 3nm/5nm/7nm and more. Collaborate with cross-functional teams including RTL design, verification, and DFT...

Company: Marvell
Posted Date: 02 Sep 2025

Senior Staff to Principal Engineer - ESD Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior Staff... Design, Electrical Engineering, and SOC (System on Chip) teams to provide support from the initial design phase through...

Company: Marvell
Posted Date: 29 Aug 2025

Principal Engineer, RTL Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal..., you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams...

Company: Marvell
Posted Date: 07 Aug 2025

Design Principal Engineer

and debug Help develop and/or evaluate design and verification methodologies and participate in improving existing ones..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE...

Company: Marvell
Posted Date: 31 Jul 2025

RTL Design Integration Manager - FEINT

_ Front-End Silicon Design & Integration (FEINT) Manager The role: A Front-End Silicon Design and Integration (FEINT... provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers...

Posted Date: 20 Jul 2025