Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead/Senior Design... in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL...
environment creating software solutions. You will: Design and lead the effort on automation, CI/CD processes and tools to make..., 5G Radio unit development Experience in developing FPGA functional specification via RTL design and verification...
design capabilities and infrastructure in alignment with company-wide technology strategy. Lead RTL-to-GDSII implementation..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise...
to 64 Gbps or higher Your role and responsibilities - Lead the Architecture, Design and development of processor MMU... (Memory management unit) for high-performance IBM Systems. - Develop micro-architecture, Design RTL, Collaborate...
quicker on the most trusted hardware platform in today's market. We are looking for a DFT lead to join our dynamic team..., embedded firmware, functional verification and RTL design Experience working with test teams for silicon bring up, silicon...
Science background to lead our leading-edge algorithms and AI technology within our EDA solutions to increase our design team...++. Strong background in Logic Synthesis or RTL Verification or Clock Tree Synthesis etc. EDA Tool/Methodology development experience...
and sign-off criteria Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal... Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key...
About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs... with large digital & analog interfaces. You'll influence implementation, guide methodology improvements, and lead small...
. Job Description Are you ready to push the boundaries of what's possible in technology? Join the trailblazers at Sandisk, as an ASIC RTL Design... Engineer, you will be at the forefront of designing high-performance ASICs. By leveraging your expertise in RTL design...
and problem-solving skills. Should have hands on Physical Design experience and must have handled RTL to GDS II at Top level... or Hierarchical top level for at least few tape outs. Must have led physical design team/s in the capacity of technical lead...
General Summary: Job Title: Wireless R&D IP Design Lead Location: Bangalore Roles and Responsibilities Contribute... Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture and RTL...
. Job Description Position Overview: We are looking for a highly skilled and experienced individual for SoC PD lead position for driving SoC... implementation efforts from RTL to GDSII. This role is pivotal within our talented team of engineers, ensuring that we meet our GDS...
. SanDisk, a leader in data storage solutions, is seeking talented and experienced ASIC RTL Design Engineers to join our cutting... where your technical expertise and strategic vision will drive projects from concept to mass production. Key Responsibilities: Lead...
Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide... with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...
, signal generators, logic analyzers, protocol analyzers, spectrum analyzers etc. · Experience with FPGA/CPLD RTL design.... · Good presentation skills required. We are looking for a motivated and enthusiastic person, at Staff level, who can lead...
Business Unit (DBU) is seeking a Senior Physical Design Engineer to lead the development of complex mixed-signal SoCs... Responsibilities Execute RTL-to-GDSII flow including synthesis, floorplanning, placement, clock tree synthesis (CTS), routing...
Develop and maintain 3rd party tool integration and product enhancement routines Should lead implementation flow... Experience 1+ years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence...
Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal direction, developing... Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key contributor...
Business Unit (DBU) is seeking a Staff STA Engineer to lead timing sign-off and closure for complex mixed-signal SoCs..., Tempus). Implement ECOs for timing fixes and validate changes. Collaborate with RTL, physical design, and DFT teams...
is a plus. Background in RTL Build and Design Automation is a plus. Ways to stand out from the crowd: Chip lead type of technical... in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical...