FPGA Prototype/Emulation Lead – Platform Software & FPGA Team Location: Pune / Bangalore – India Join the RISC...: We are seeking highly skilled FPGA and emulation engineer/lead to join our team and help us build FPGA designs for our CPU’s (64-bit...
Lead End to End IP/Subsystem/SOC Verification Develop Verification Strategy for any given Design. Architect, Develop... ( PA RTL/PA GLS) and Gate Level Verification. Performance Verification Explore and deploy AI/ML based verification...
strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain... and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script...
and must have handled RTL to GDS II at Top level or Hierarchical top level for at least few tape outs. Must have led physical design team.../s in the capacity of technical lead or as a go to person. KEY RESPONSIBILITIES: Oversee and manage power convergence...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Custom Compute & Storage - CCS... including the CXL product line. What You Can Expect As a Chip Lead, you will be responsible for driving a complete chip...
Methodology/Architect/RTL execution Lead for the high-speed SERDES Phys, Next gen Memory Phys and Die-to-Die interconnect IPs..., RTL coding, supporting scan stitching, timing constraints development, supporting ATPG as well as post-silicon bringup...
, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features.... Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test...
, you will help bring to life cutting-edge designs. You will lead a front-end design verification team, and work closely... will have experience leading a team verifying RTL for IP or subsystems and understand architectural specifications. Responsibilities...
to Skip to Content Link Search Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead L1 Req....com. Job Description: Job Description Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various...
and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation... and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. Power...
, and communicated to the PD/RTL/Architecture team. Identify creative solutions for complex paths in multi-mode, functional, and test... scenarios. This role requires deep technical expertise in physical design tools and methodologies and the ability to lead...
to Skip to Content Link Search Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead - L1 Req....com. Job Description: Job Description Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various...
strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain... and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script...
Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Lead MTS Design... in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL...
Lead the Define and drive end-to-end RTL-to-GDSII flows, tailored for customer-specific technology, tools, and deliverables.... Independently drive the project with minimal support from customer. Lead complex top-level, Subsystem and block level executions...
state of the art. About the Role As SOC Design Lead one will be responsible for driving complex SOC project..., Emulation and Software. Key Responsibilities SOC Design and Development Lead End to End design for complex SOCs in IOT...
Analog Mixed Signal design verification experience RTL and GLS verification experience Planning & risk mitigation; mentor...
(formal, simulation) to improve efficiency and quality. Debug RTL and testbench issues using industry-standard tools...
(formal, simulation) to improve efficiency and quality. Debug RTL and testbench issues using industry-standard tools...
next-generation Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture... and RTL coding using System Verilog, Verilog, or VHDL. Collaborate with multi-geo teams for design and verification...