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Keywords: RTL / Design Verification Engineer, Location: Santa Clara, CA

Page: 4

FPGA Engineer

robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands...Job Title: Electrical Engineer Location: Santa Clara CA 95054 Duration: 03/16/2026 to 08/28/2026 Shift: ["Monday...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 25 Feb 2026

Engineer 3 - Electrical Engineering

engineer will own RTL design from architecture through validation, working hands-on across the full FPGA development lifecycle...Title: Electrical Engineer 3 Location: Santa Clara, CA Duration: 5+ Months Pay Range: $54–60/hr...

Posted Date: 25 Feb 2026

Staff DFT Engineer

from RTL/netlist through post-silicon debug. In this role, you will partner closely with RTL, Physical Design, and ATE teams... violations at both block and top levels Run, analyze, and debug SpyGlass DFT/RTL checks, working with design teams to close...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Feb 2026
Salary: $128000 - 189370 per year

FPGA Engineer

robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands...Job Title: Electrical Engineer Location: Santa Clara CA 95054 Duration: 03/16/2026 to 08/28/2026 Shift: ["Monday...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 24 Feb 2026

CPU Performance Modeling Engineer (RISC V)

Engineer, you will architect and design state-of-the-art CPUs that push the envelope on performance, energy efficiency... in detail, model them, and work with the design team in productizing them. We are looking for an experienced engineer for CPU...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 20 Feb 2026

Senior DFX Methodology Engineer

. In addition, you will help architect, develop and deploy DFT methodologies for our next generation products including RTL design..., Verification, pattern generation, partnering with teams like timing, physical design, software, bringup, production...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Feb 2026

Lead STA & Implementation Engineer

, Access point (WIN), XR, automotive, and IoT platforms. You will collaborate closely with Architecture, RTL design, Design... verification, DFT, and physical design teams to deliver high-quality silicon on aggressive schedules. The responsibilities include...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Feb 2026

Senior Staff Engineer, Static Timing Analysis (STA) Engineer

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure Provide... Physical Design team at Marvell in Santa Clara is seeking a Senior Staff Engineer, Static Timing Analysis (STA) Engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Feb 2026
Salary: $131010 - 196300 per year

FPGA Prototyping Engineer

/HAPS platforms across AMD’s next-generation silicon programs. You will collaborate closely with architecture, RTL design...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...

Posted Date: 04 Feb 2026

Formal Equivalence Checking Methodology Engineer

, and optimizing RTL verification methodologies - Logical Equivalence and RTL Lint, for our ground breaking VLSI designs. This role... is crucial in ensuring the functional equivalence of our designs throughout the design cycle, from RTL to GDSII! What you’ll...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Senior DFT Engineer

breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up... DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior ASIC Infrastructure Engineer

communication and interpersonal skills Ways to stand out from the crowd: Exposure to RTL design/verification tools (VCS... of chip design ! NVIDIA is seeking a passionate, highly motivated, and creative senior software engineer to be part of its CPU...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Principal Application Engineer

specializing in digital, RTL design, Power analysis, power optimization, PPA trade-off, verification , etc Experience leading... design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions...

Posted Date: 16 Jan 2026

Application Engineer

in EDA, semiconductor design specializing in digital, RTL design, Power analysis, power optimization, PPA trade-off... insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create...

Posted Date: 16 Jan 2026

Numerical Architecture Engineer

& architecture design, modelling, RTL creation, high/higher level synthesis and formal verification across the design abstractions... whether architecture, modelling, design, formal verification and high-level synthesis teams. The candidate will have full...

Posted Date: 07 Jan 2026

ASIC Methodology Engineer

and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science..., Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Feb 2026

Senior Software Engineer, Hardware Tools and Methodology Development

from the crowd: Prior experience in RTL design (Verilog), verification and synthesis. Proficiency in C++, Perl, Python... is looking for a dedicated and motivated Software developer with particular interest in algorithms and RTL Design. Understanding both Software...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Feb 2026

EDA Flow Engineer

. Responsibilities: Identify and prioritize high-impact opportunities to apply AI/ML to chip design and verification workflows...Work closely with design teams and CAD/EDA stakeholders to identify workflow bottlenecks across the chip development...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 06 Feb 2026
Salary: $110000 - 145000 per year

Senior ASIC Engineer

from specification through silicon bring-up, working with world-class verification and physical-design engineers to hit aggressive..., and silicon bring-up. Collaborate with verification engineers to debug complex scenarios, close coverage, and add design-for-debug...

Location: Santa Clara, CA
Posted Date: 04 Feb 2026

Applications Engineering Consultant – FPGA Prototyping

: Experience & Education 5+ years' experience in design, verification, simulation, emulation/prototyping of electronics chips... Technical: SystemVerilog, Verilog and VHDL RTL design experience ASIC and/or FPGA implementation experience (synthesis...

Company: Siemens
Location: Santa Clara, CA
Posted Date: 15 Feb 2026