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Keywords: ASIC Methodology Engineer, Location: Santa Clara, CA

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ASIC Methodology Engineer

Summary: The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry... and platforms, low power architecture, methodology, and IP, and foundation IP development. About the Role As a member of the...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Feb 2026

Senior RTL Analysis Methodology Engineer

to do their best work. Come join the team and see how you can make a lasting impact on the world. We seek an RTL Analysis Methodology... Engineer to join our Logic Design Implementation team. The team develops and supports static RTL verification methodologies...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Formal Equivalence Checking Methodology Engineer

Formal Equivalence Checking Methodology Engineer to join our VLSI team. This team is responsible for developing, maintaining..., including RTL-to-RTL, RTL-to-Gate, and Gate-to-Gate equivalence checking. Collaborate with ASIC design teams to understand...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... To See: MS (or equivalent experience) in Electrical or Computer Engineering with 3 years’ experience in ASIC Design and Timing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Timing Methodology Engineer, Custom Circuits

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... with 5+ years experience in ASIC Design and Timing. Proven understanding of circuit design and spice simulations. Hands...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

SOC IP Methodology Engineer - Custom SOC

Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP... and procedures. Be responsible for results/handoffs to and from Customers, methodology solutions and schedule plans...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Senior Methodology Engineer, CAD Tooling

looking for a Methodology/CAD Engineer to join our team! In this role you'll be building solutions to boost productivity and efficiency.../Engineering or equivalent experience 3+ years of experience in VLSI CAD flows and methodology is required Good programming...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

Power Methodology Engineer, Data Center Hardware IPs

-performance computing hardware used in large-scale AI and machine learning applications Driving power methodology for AI-specific..., physical design). Analysis and modeling: Creating power models and scripts for performance/power trade-offs. Methodology...

Posted Date: 27 Nov 2025

Senior Software Engineer, Hardware Tools and Methodology Development

understanding of ASIC Design and understanding of Verilog RTL Strong interpersonal and collaboration skills. Ways to stand out...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Feb 2026

Design Verification Engineer - ASIC/UVM/SystemVerilog

Azure, and Oracle. THE PERSON: We are seeking a high-impact MTS Design Verification Engineer with strong technical depth..., ownership, and the ability to drive verification closure on complex, high-performance ASIC designs. The ideal candidate brings...

Posted Date: 12 Feb 2026

ASIC Design Efficiency Engineer

We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers.... Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 30 Jan 2026
Salary: $116000 - 189750 per year

Senior ASIC Timing Engineer

to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC... Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer... Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: BS...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two.... As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Dec 2025

Principal Digital Design Engineer

etc. Deep understanding of ASIC design flows and methodology Strong analytical and interpersonal skills, excellent teammate...We are looking for a Principal Digital Design Engineer to join our Semi-Custom Silicon products group. In this role...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Feb 2026

Senior Staff Engineer, Static Timing Analysis (STA) Engineer

Physical Design team at Marvell in Santa Clara is seeking a Senior Staff Engineer, Static Timing Analysis (STA) Engineer... with both local and global team members on the physical design of complex chips as well as the methodology to enable an efficient...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Feb 2026
Salary: $131010 - 196300 per year

Lead STA & Implementation Engineer

Timing Analysis (STA) and Synthesis Engineer to contribute to the development of next-generation connectivity chipsets...) constraints during implementation. Perform functional ECOs including conformal ECOs Methodology: Develop AI-driven flows...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Feb 2026

Memory Controller Design Engineer

Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The... engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT products. The candidate will work...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Feb 2026
Salary: $107400 - 161200 per year

Senior Digital Design Engineer

etc. Deep understanding of ASIC design flows and methodology Strong analytical and interpersonal skills, excellent teammate...We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Custom SOC IP Verification Engineer

a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI...NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026