Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: RTL/IP Design Lead, Location: Bangalore, Karnataka

Page: 3

LEAD PLATFORM EMULATION ENGINEER

cause; work with RTL and firmware engineers to resolve design defects and correct any test or infra issues Responsible... your career. LEAD PLATFORM EMULATION ENGINEER: THE ROLE: The focus of this role is to plan, build, execute the verification...

Posted Date: 26 Nov 2025

Lead Software Engineer (Safety/MCAL)

understanding of FPGA architecture, system-level design, and prototyping flow from RTL to implementation. Good understanding...FPGA Prototype/Emulation Lead – Platform Software & FPGA Team Location: Pune / Bangalore – India Join the RISC...

Posted Date: 23 Nov 2025

DFT (DFX) Lead Engg

Methodology/Architect/RTL execution Lead for the high-speed SERDES Phys, Next gen Memory Phys and Die-to-Die interconnect IPs..., and be able to independently drive tasks to completion. Key Responsiblities Lead and define PHY specific Design for Test...

Posted Date: 14 Nov 2025

VLSI Lead L1

.com. Job Description: Job Description Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various... to Skip to Content Link Search Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead L1 Req...

Company: Wipro
Posted Date: 05 Nov 2025

STA Synthesis Lead

, and area (PPA) targets on SerDes PHY IPs. THE PERSON: As a senior member of the SerDes IP Physical Design team... scenarios. This role requires deep technical expertise in physical design tools and methodologies and the ability to lead...

Posted Date: 01 Nov 2025

VLSI Lead - L1

.com. Job Description: Job Description Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various... to Skip to Content Link Search Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead - L1 Req...

Company: Wipro
Posted Date: 16 Oct 2025

Lead MTS Verification Engineering

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Lead MTS Design..., sequences, debug of controller RTL design · Development & support of Verification environment scripting and capabilities...

Company: Rambus
Posted Date: 09 Oct 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture...

Company: UST
Posted Date: 04 Dec 2025

Technical Lead II - VLSI

. Qualifications: REQUIRED: • Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design...: Fpga Design,Verilog RTL based IP design,System Verilog About Company: UST is a global digital transformation solutions...

Company: UST
Posted Date: 03 Dec 2025

Senior Lead Engineer

Job Requirements Role Overview We are seeking a highly motivated and skilled SoC RTL Integration & Design Sign-off... design adheres to the defined power strategy through comprehensive RTL VCLP (Voltage/Current Leakage Power) checks and low...

Company: Quest Global
Posted Date: 26 Nov 2025

Si GPU Functional Debug Engineer(Senior/Lead/Staff)

debug architecture of GPU core. Preferred Qualifications 4 to 10 years of experience working in RTL Design (Micro... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 08 Nov 2025

Si GPU Functional Debug (Compute) - Sr Lead Engineer

debug architecture of GPU core. Preferred Qualifications 5+ years of experience working in RTL Design (Micro... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 06 Nov 2025

Lead Engineer, Senior - Infra Systems Architect

in development of the testplan and test scenarios for bug free RTL Preferred Qualifications 8+ years of experience in IP..., you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions...

Company: Qualcomm
Posted Date: 30 Oct 2025

Urgently Hiring 10 + Years of DFT Lead Engineers_Exposure on SCAN insertion, ATPG and pattern simulation/debug._Bangalore Location_CTC 80 LPA+

of the role, but not limited to,  working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass... DFT, RTL implementation, Verification, Scan and ATPG.  SCAN insertion, ATPG and pattern simulation/debug.  MBIST...

Company: Angel & Genie
Posted Date: 26 Sep 2025

Principal Product Engineer

Engineer – Memory IP Products Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY..., HBM3/4, GDDR6/7 or similar IPs Verilog RTL design and gate level verification experience Synthesis and STA experience...

Posted Date: 23 Oct 2025

SMTS Verification Engineering

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead/Senior Design... of controller RTL design Development & support of Verification environment scripting and capabilities Qualifications: Bachelors...

Company: Rambus
Posted Date: 13 Dec 2025

DFT Engineer

, embedded firmware, functional verification and RTL design Experience working with test teams for silicon bring up, silicon... quicker on the most trusted hardware platform in today's market. We are looking for a DFT lead to join our dynamic team...

Company: IBM
Posted Date: 12 Dec 2025

Staff Synthesis & STA Engineer

on Synthesis/STA of 4+ successful tapeouts at lower geometries Familiar with digital flow design aspects RTL to GDS Proficiency... About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs...

Posted Date: 12 Dec 2025

Technologist, ASIC Development Engineering

/chip level The job would require complete ownership from RTL to GDS for complete SoC Exposure to IP Hardening for blocks.... Job Description Position Overview: We are looking for a highly skilled and experienced individual for SoC PD lead position for driving SoC...

Company: SanDisk
Posted Date: 10 Dec 2025

Senior Technologist, ASIC Development Engineering

. SanDisk, a leader in data storage solutions, is seeking talented and experienced ASIC RTL Design Engineers to join our cutting...: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware...

Company: SanDisk
Posted Date: 10 Dec 2025