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Keywords: Principal Post-Silicon Validation Engineer, Location: Santa Clara, CA

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Principal Post-Silicon Validation Engineer

your knowledge in analog/mixed signal design during post-silicon validation, with a focus on electrical characterization... validation, and performance analysis. Create customizable hardware reference design to ensure consistent and reliable data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Oct 2025
Salary: $143200 - 214500 per year

SERDES Validation Director

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Marvell post silicon validation... multi-core Arm-based Network processors. The electrical characterization team is a post silicon validation sub-group focused...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 20 Sep 2025

Principal Engineer - Design For Test (DFT)

Principal Engineer with Marvell, you’ll be a member of the Custom Silicon Engineering team. This team is a leader in large multi... architecture definition, implementation of various DFT/DFX features, validation, IP-DFT, STA, pattern generation & post-silicon...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Sep 2025
Salary: $146850 - 220000 per year

Principal Mixed Signal Design Engineer

and performance. Conduct post-silicon testing and validation of analog mixed-signal circuits. Collaborate with cross-functional... that layout designs meet performance, area, and reliability requirements. Proficiency in post-silicon validation, including hands...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Aug 2025
Salary: $165630 - 248100 per year

Analog Design Engineer, Principal

creation Silicon bring-up, debug and support Team communication and documentation What We're Looking For Master’s degree..., Spectre, ADE and post layout extraction tools) is a must Knowledge of the fundamentals on signal integrity improvement, noise...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Oct 2025
Salary: $165630 - 248100 per year

Principal Emulation Engineer

, validating the design on emulation and drive left shift of SW and post-silicon readiness for all of CCS products. As part.../SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Oct 2025
Salary: $146850 - 220000 per year

CPU Server Physical Design Engineer

and verification, and post-silicon validation) that meet customer and industry standards. Writes detailed technical documentation..., formal verification, or silicon validation. 2+ years of experience in creating functional models, checkers, test plans...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 17 Oct 2025

GPU Power Architect/Microarchitect Lead

, Emulation, Physical Design and post-si validation Fluent familiarity with power tools like Power Artist and PTPX. Principal... engineer you will drive the microarchitecture and RTL optimizations and methodologies required to achieve the product power...

Posted Date: 09 Oct 2025