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Keywords: Principal Layout Engineer, Location: San Jose, CA

Page: 1

Principal Layout Engineer

Layout Engineer to join our Memory Interconnect Design team in San Jose, California. In this role, you will be working... Layout Engineer, you’ll play a pivotal role in Analog/Mixed-signal product designs. In this full-time role, you’ll report...

Company: Rambus
Location: San Jose, CA
Posted Date: 22 Feb 2026

Principal High-Speed Analog Layout Engineer

Principal High-Speed Analog Layout Engineer US Citizen or US Permanent Resident preferred Full-time Employee + Bonus..., Benefits, 401k, Stock Options Responsibilities Lead and own the physical layout design of complex analog/mixed-signal...

Location: San Jose, CA
Posted Date: 13 Feb 2026

Principal Analog Design Engineer

Staff or Principal Analog Design Engineer US Citizen or US Permanent Resident preferred Full-time Employee + Bonus..., ADE, and post layout extraction tools) is a must Experience with electromagnetic simulation tools (EMX, Momentum, HFSS...

Location: San Jose, CA
Posted Date: 20 Feb 2026

Principal Mechanical Engineer- Video Collaboration

impact while having the flexibility to do it in their own way. The Team and Role: We're looking for a Principal... Mechanical Engineer to be a senior technical leader and decision-maker on our Video Collaboration product development team...

Company: Logitech
Location: San Jose, CA
Posted Date: 06 Feb 2026

Principal Engineer Product Development Applications Engineer

a tech revolution? As a Principal Engineer Product Development Applications Engineer on our Customer Collaboration... and debug of switching power supplies Using schematic entry, circuit simulation, and PCB layout tools Matlab/Simulink...

Company: Infineon
Location: San Jose, CA
Posted Date: 31 Jan 2026

Senior / Principal Electrical Engineer – Engineering Team Lead - San Jose/Anaheim (2 openings) - $120-158k

Title: Senior / Principal Electrical Engineer - Engineering Team Lead Location: 2 Openings: Anaheim/San Jose Duration... as Engineer of Record for projects within their responsibility. The duties and responsibilities are intended to describe the...

Company: Genuent
Posted Date: 05 Dec 2025
Salary: $120000 - 158000 per year

Principal Field Applications Engineer

an exceptional PE Field Application Engineer to join our Sales team. In this role, you will be working with some of the brightest..., specifically RCD, CKD, PMIC, SPD and TS. Provide thorough customer design support including schematic and PCB layout review...

Company: Rambus
Location: San Jose, CA
Posted Date: 19 Feb 2026

Principal Field Applications Engineer

an exceptional PE Field Application Engineer to join our Sales team. In this role, you will be working with some of the brightest..., specifically RCD, CKD, PMIC, SPD and TS. Provide thorough customer design support including schematic and PCB layout review...

Company: Rambus
Location: San Jose, CA
Posted Date: 19 Feb 2026

Principal Engineer, Power Design

. And we have an unrelenting drive to find the way for our customers. Let's engineer the future together. Responsible for architecting... interfaces, NPUs, FPGAs, High speed memory (DDR4/DDR5) and high-speed PCB layout. You will work with design, software/firmware...

Company: Celestica
Location: San Jose, CA
Posted Date: 06 Feb 2026

Principal RFIC Design Engineer

level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification... tools (Cadence, Mentor, Siemens, Ansys etc.) Experience with RF and high performance analog block layout such as LNA, mixer...

Company: Western Digital
Location: San Jose, CA
Posted Date: 19 Feb 2026

Principal Analog/Mixed-Signal IC Design Engineer

, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification... of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.) Experience with analog layout techniques of mismatch...

Company: Western Digital
Location: San Jose, CA
Posted Date: 19 Feb 2026
Salary: $145800 - 194400 per year

Principal RFIC Design Engineer

level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification... tools (Cadence, Mentor, Siemens, Ansys etc.) Experience with RF and high performance analog block layout such as LNA, mixer...

Company: Western Digital
Location: San Jose, CA
Posted Date: 19 Feb 2026
Salary: $145800 - 194400 per year

Principal Analog/Mixed-Signal IC Design Engineer

, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification... of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.) Experience with analog layout techniques of mismatch...

Company: Western Digital
Location: San Jose, CA
Posted Date: 18 Feb 2026

Principal Engineer, Product application

, layout guidelines. Performing verification and testing of evaluation kits, and generating evaluation reports for customers...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 16 Jan 2026

Senior Principal, Design Engineering, Power Design

Functional Area: Engineering (ENG) Career Stream: Engineering (ENG) Role: Senior Principal (SPR) Job Title: Senior Principal... drive to find the way for our customers. Let's engineer the future together. Responsible for architecting, implementing...

Company: Celestica
Location: San Jose, CA
Posted Date: 28 Jan 2026

Principal, Design Engineering

Power Engineer develops new electrical systems/circuits for various applications. Research system ideas and draw up plans.... The Senior Staff Power Engineer works in cross functional teams with other designers, customers, manufacturing engineering...

Company: Celestica
Location: San Jose, CA
Posted Date: 28 Jan 2026

Power Semiconductor Engineers - Datacenter, 48V, DC/DC Conversions

. Location: Hybrid worksite, San Jose, CA 1) We seek an innovative Principal Design Engineer for a San Jose power semiconductor... ... Constant-on-time, current mode, multi-phase DCDC ... Power design and layout techniques for robustness and reliability...

Posted Date: 24 Jan 2026