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Keywords: Principal Design Engineer- Memory IP, Location: San Jose, CA

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Sr Principal Design Engineer- Memory IP

. Specific duties include: Be responsible for high-performance memory IP architecture design, owning the IC micro-architecture... strong communication, verbal and written. Experience on the memory IP is desired Requires good communication skills in English. The...

Posted Date: 12 Dec 2025

Principal Design Engineer- Memory IP

. Requires good communication skills in English. Familiar with JEDEC-DDR, and DFI protocols and have memory IP design experience.... Specific responsibilities: Proficiency in logic design and micro-architecture Proficiency in Verilog/SystemVerilog and its...

Posted Date: 11 Dec 2025

Sr Principal Product Engineer – Memory IP

. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Our customers... Join our growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wide range...

Posted Date: 23 Nov 2025

Principal ASIC Test Development Engineer

Principal ASIC Test Development Engineer This role has been designed as ‘Hybrid’ with an expectation... with HPE. Job Description: Individual contributor role responsible for testability solutions of ASICs, memory...

Posted Date: 18 Dec 2025

Principal Application Engineer

, memory interface chips, DIMM, server and BIOS operation and interaction. The PE System Application Engineer is a Full-Time... design wins. Assist with validation and debug of new memory interface chips for DDR5 servers. Collect and analyze signal...

Company: Rambus
Location: San Jose, CA
Posted Date: 25 Jan 2026