Title: Physical Design Lead (PnR, STA) About GlobalFoundries GlobalFoundries is a leading full-service... semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world...
across synthesis, STA, and physical domains. Skills & Experience Required: 10–15 years of hands-on experience in physical design...’s competency & capability. Technical Mentorship Mentor physical design teams on advanced technology node implementation...
industry-leading EDA tools for synthesis, place-and-route (PnR), and physical verification processes to take the design thru... a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA...
on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...
physical design teams on advanced technology node implementation, complex SoC partitioning, and tool optimizations, Low power.... low power implementation (UPF), hierarchical signoff closure, and flow correlation across synthesis, STA, and physical...
across synthesis, STA, and physical domains. Skills & Experience Required: 15–22 years of hands-on experience in physical design...’s competency & capability. Technical Mentorship Mentor physical design teams on advanced technology node implementation...
and detail-oriented Physical Design Program Manager to lead and drive execution across complex ASIC/SoC development programs... Manager (TPM) will lead all block/chip level Physical Design (PD) activities, from floor planning to layout verification...
SoC physical design projects. The ideal candidate will have extensive hands-on expertise in RTL2GDS implementation..., and milestones. Technical Mentorship Mentor physical design teams on advanced technology node implementation, complex SoC...
_ Drive and lead execution with SOC teams for Design. Drive efficiency on execution of SOC for integration as well... design, RTL Quality checks, Clock, Reset, Fuses, Synthesis, Timing Analysis, Design Partitioning, PPA optimization, PnR...
, Design Partitioning, PPA optimization, PnR, Timing analysis, Floorplan convergence, Physical design implementation..., Synthesis – DC/FC, ICC, and Physical design implementation/signoff tools, STA and constraints analysis tools. Expertise in SOC...
industry-standard STA tools. Analyze timing reports and debug violations, providing guidance to physical design, RTL, and DFT...We are seeking an experienced Lead STA Engineer to take ownership of the static timing closure process for complex ASIC...