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Keywords: Memory Design Engineer, Location: Santa Clara, CA

Page: 1

GPU Design Engineer - Memory Hierarchy

. Join us to help deliver the next groundbreaking products containing an Apple designed GPU. As part of the GPU Memory Hierarchy Design...! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade...

Company: Apple
Location: Santa Clara, CA
Posted Date: 14 Sep 2025
Salary: $126800 - 190900 per year

Memory Design Engineer

Work on detailed transistor level design of analog and mixed signal circuits in memory (DRAM/SRAM) for display chip... with Cadence OrCAD, Altium Designer, and SPICE. Perform the block level and transistor level layout and circuit design. Collaborate...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 13 Aug 2025
Salary: $156853 - 160000 per year

Memory Design Engineer

Work on transistor level design of analog and mixed signal circuits in memory (SRAM/DRAM) for display chip or image... such as Virtuoso, Calibre, PrimeTime, Encounter/Innovus, Design Compiler, SPICE. Circuit design with focus on memory design...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 12 Aug 2025
Salary: $156853 - 160000 per year

Senior Memory Controller Verification Engineer

NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem... crowd: Strong C/C++ programming experience Prior Design or Verification experience of dynamic memory controllers (ddr{2...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Oct 2025

Senior Memory System Engineer

NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems... Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solution for Tegra...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Oct 2025

Power and Performance Engineer - System Memory

of experience in memory subsystem architecture, design, and validation, with a strong focus on system-level features that optimize... design, signal integrity, low power design, memory power management techniques, timing analysis, and architecture. It...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Sep 2025

Senior Distinguished Custom Memory Architect Engineer

and innovative Senior Distinguished Custom Memory Architect Engineer to push the boundaries on next generation memory architectures... and work closely with peer architecture teams, memory vendors, standard organizations, and customers to define and design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

Lead Post-Silicon Memory Subsystem Engineer

NVIDIA is looking for a Lead DRAM Memory Subsystem Validation Engineer! NVIDIA has continuously reinvented itself over.... We are seeking a Lead DRAM Memory Subsystem Validation Engineer within the GPU/SOC Engineering Team to help drive development...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 06 Aug 2025

Senior Software Engineer - CUDA and Unified Memory

. Unified Memory kernel driver provides kernel memory management that enables these advanced features. What you'll be doing...: As a member of our team, you will apply your design, coding expertise, and creativity, and to collaborate with peers across NVIDIA...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jul 2025

Senior SRAM Engineer, Circuit Design

languages - Perl and Python Strong understanding of SRAM and memory design techniques and macro/block development Ways...We are now looking for a Senior SRAM Engineer! The Full Custom Macro team at NVIDIA designs specialized RAM...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 04 Oct 2025

Senior Mixed Signal Design Engineer

, to amplify human creativity and intelligence. We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer... DRAM SerDes solutions. What you'll be doing: Mixed-Signal/Analog circuit design for High-Speed Memory I/O Interfaces...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Oct 2025

Design Verification Engineer

Design Verification Engineer 12 Months Santa Clara, CA Hybrid Role: 2-3 days in Office THE ROLE...: We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part...

Company: Sunrise Systems
Location: Santa Clara, CA
Posted Date: 28 Sep 2025

ASIC/RTL Design Engineer - Specialized (US)

Job Title: ASIC/RTL Design Engineer Duration: 12+ months Location: Santa Clara, CA Key Responsibilities: Develop... the root cause, work with RTL and firmware engineers to resolve design defects and correct any test issues. Work...

Posted Date: 27 Sep 2025

Silicon Design Verification Engineer

_ THE ROLE: Join AMD’s Radeon Technology Group as a Design Verification Engineer contributing to the development of the... Graphic Memory Controller (GMC)—a foundational IP used across AMD’s SOCs for discrete graphics, data center GPUs, and game...

Posted Date: 26 Sep 2025

Digital Design Engineer, Principal

, memory subsystems, and peripheral interfaces gained through real-world design challenges. Extensive experience creating.... We develop the architecture, collaborate on IP development, create the physical design, and work with the world’s leading AI data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025
Salary: $146850 - 220000 per year

Senior IP Design Verification Engineer

, we are building a better tomorrow. Who We Are We are seeking a highly skilled Verification Engineer to work on verification... and validation of advanced memory coherency fabric systems for next-generation data center and AI chips. The ideal candidate...

Company: Intel
Location: Santa Clara, CA
Posted Date: 18 Sep 2025

CPU Top-Level Design Verification Engineer

Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower... - Strong understanding of processor design, instruction set architectures, pipeline design, cache hierarchies, and memory systems RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 18 Sep 2025
Salary: $126800 - 190900 per year

CPU Top-Level Design Verification Engineer

Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower... design, cache hierarchies, and memory systems RTL development - Experience creating efficient, synthesizable RTL code...

Company: Apple
Location: Santa Clara, CA
Posted Date: 17 Sep 2025

Formal Design Verification Engineer

base for all our IP. We are looking for a design verification engineer in the Dram Controller IP at AMD's Penang Design..._ THE ROLE: The Graphic Memory Controller(GMC) is an IP that delivers into all SOCs that are shipped by AMD's Radeon...

Posted Date: 05 Sep 2025

Senior Design Engineer, Coherent High Speed Interconnect

NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA... visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Sep 2025