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Keywords: Low Power Design Engineer (Synthesis), Location: Hyderabad, Telangana

Page: 1

Low Power Design Engineer (Synthesis)

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: This position for a CAD Engineer will be critical to shaping the... next generation AMD products, the leader in CPUs, GPUs, and adaptive compute engines. It requires interfacing with large design teams...

Posted Date: 18 Jan 2026

Low Power Design Engg (PTPX)

Responsibilities: Work with front end RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design... in validating low power design features at SoC and IP level. Preferred Experience Experience with Synopsys EDA tools...

Posted Date: 14 Dec 2025

Synthesis and STA ENGINEER

your career. MTS Synthesis and STA ENGINEER THE ROLE: The focus of this role is to plan and execute the front end..., low power aspects and concepts of DFT Have debug experience to solve issues. scripting and automation ACADEMIC...

Posted Date: 04 Jan 2026

SDC, Synthesis and STA Engineer

your career. SDC, Synthesis and STA Engineer THE ROLE: The focus of this role is to plan and execute the front end... understanding of timing constraints, low power aspects and concepts of DFT Have debug experience to solve issues. Interst...

Posted Date: 24 Dec 2025

SDC, Synthesis and STA Engineer

your career. SDC, Synthesis and STA Engineer THE ROLE: The focus of this role is to plan and execute the front end... understanding of timing constraints, low power aspects and concepts of DFT Have debug experience to solve issues. Interst...

Posted Date: 24 Dec 2025

SDC, Synthesis and STA Engineer

your career. SDC, Synthesis and STA Engineer THE ROLE: The focus of this role is to plan and execute the front end... understanding of timing constraints, low power aspects and concepts of DFT Have debug experience to solve issues. Interst...

Posted Date: 24 Dec 2025

Principal Engineer, STA & Synthesis

-node technologies (e.g., 22nm, 12nm) and low-power design strategies and multi-clock domain designs Expertise in Synopsys...Job Description We are seeking a Principal Engineer - Implementation Lead to own synthesis and timing closure sign...

Posted Date: 16 Dec 2025

Mid Level SoC Design Engineer (ARM Architecture &)

Spyglass. Familiarity with low-power design techniques, UPF, and tools like PowerArtist or Power Compiler (a plus). FPGA...Job Title- Mid Level SoC Design Engineer (ARM Architecture &) Location- Hyderabad, TL Client- Product Based Role...

Company: Best NanoTech
Posted Date: 24 Jan 2026

RTL Design Engineer

with low power design and low power flow is an added plus Must have scripting knowledge in either python/Perl Experience... your career. RTL DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design engineer...

Posted Date: 09 Jan 2026

RTL Design Engineer

your career. RTL DESIGN ENGINEER THE ROLE: We are looking for a Senior Silicon Design Engineer to design and deliver low..., with emphasis on low-power design, power intent (UPF), clock/reset, CDC, SOC design,IP Integrations The candidate...

Posted Date: 09 Jan 2026

Physical Design Engineer, Senior

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical..., Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification...

Company: Qualcomm
Posted Date: 07 Jan 2026

Sr. Silicon Design Engineer

your career. SENIOR Synthesis and STA ENGINEER THE ROLE: The focus of this role is to plan and execute the front end..., low power aspects and concepts of DFT Have debug experience to solve issues. scripting and automation ACADEMIC...

Posted Date: 04 Jan 2026

RTL Design Integration and SDC Engineer

your career. RTL Design, Integration and SDC Engineer THE ROLE: The focus of this role is to plan and execute the front end... designs, high frequency clocks and complex clocking Complete understanding of timing constraints, low power aspects...

Posted Date: 25 Dec 2025

Physical Design CAD flow and methodology Engineer

and Cadence toolsets (Fusion Compiler, Innovus). Low Power Methodology: Understanding of low-power design concepts and UPF... Compiler, ICC2). Experience in synthesis, STA, or physical verification domains. Strong understanding of low-power flows: UPF...

Posted Date: 20 Dec 2025

Senior Staff, RTL Design Engineer

with low-power design techniques and multi-clock domain architectures Experience in protocols like AHB/AXI/CHI, Memory (ROM...Job Description We are seeking a highly experienced Senior Staff RTL Design Engineer to join our SoC development team...

Posted Date: 16 Dec 2025

Silicon Design Engineer

seamlessly with synthesis, Low-power, STA, EM/IR, Physical Verification teams to achieve best-in-class PPA Script out utilities... design developments PREFERRED EXPERIENCE: Hands on experience in high-performance, low-power physical design...

Posted Date: 26 Nov 2025

Physical Design Engineer

and track methodology issues. CAD Physical Design Engineer THE PERSON: You have a passion for modern, complex processor... is a plus Strong understanding of low-power flows includes UPF concepts, power-gating, isolation, level-shifter, voltage_areas, power-state tables...

Posted Date: 11 Nov 2025

Lead Physical Design Engineer

and Physical Design Tools, Flow Automation, and Improvements. Experience in complex SOC integration, Low Power and High-Speed... i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing...

Company: Cyient
Posted Date: 15 Jan 2026

Principal Engineer, Chip Design Lead

techniques Experience with low-power design techniques and multi-clock domain architectures Experience in protocols like AHB... involves driving the chip RTL design for power efficient chips and collaborating across architecture, verification...

Posted Date: 16 Dec 2025

Wireless R&D IP Design Specialist-Sr Engineer/Sr Lead

Timing Analysis (STA). Awareness of low-power and high-speed design techniques. Familiarity with industry-standard front.... Technical Requirements Strong experience in IP design (preferably wireless/DSP domain). Exposure to synthesis and Static...

Company: Qualcomm
Posted Date: 13 Dec 2025