-Lite/NoC concepts. · Good knowledge of Digital Design and RTL development - Hands-on experience with SoC Design, Verilog RTL... in various product categories. This position will be · Responsible for Micro-architecture specifications and detailed design...
General Summary: Network-on-chip (NoC)/ Interconnect Design and Architecture for the next generation System-on-chip (SoC... Responsible for specification, Micro-Arch, design and verification of interconnect and related IP's Actively work with SoC...
General Summary: Design Engineer (18+ years of experience) SoC Interconnect for the next generation System-on-chip (SoC... design lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for specification, design...
-on technical leadership in developing microarchitecture, implementing the design in RTL, RTL Integration etc. ensuring quality... RTL design and debug of complex blocks in Verilog / System Verilog Analyze design metrics and make implementation choices...
analysis of memory controller, last level cache and complex interconnect design for Snapdragon based SoCs including premium... and interconnect design analysis for Qualcomm mobile systems. The team has strong and proven impact to Qualcomm mobile system...
Qualcomm coherent and non-coherent interconnect fabric Responsible for Floor planning, design optimization for synthesis... experience in IP/SoC implementation Expertise in digital flow design implementation RTL to GDS Knowledge of ASIC back-end...
compliance, run physical verification, and manage ECOs for design revisions. Collaborate with RTL, DFT, packaging, and backend... Business Unit (DBU) is seeking a Senior Physical Design Engineer to lead the development of complex mixed-signal SoCs...
experience in SoC design Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/NoC concepts Good knowledge... of Digital Design and RTL development Hands-on experience with SoC Design, Verilog RTL coding Working knowledge of Lint, CDC...
using Perl, Ruby, Make, or similar. Exposure to RTL design, software development, formal verification, or other related... is looking for an experienced pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... verification environments for high-speed interconnect protocols (PCIe, CXL, AXI). Create and execute verification plans for high...
, and regression testing. Collaborate with RTL designers, architects, and validation teams to ensure design correctness and coverage... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...
, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers... be doing: Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power...
interface, and interconnect planning, bus routing, sequential pipeline planning and top-level design for testability (DFT... from Design specification, defining architecture, micro-architecture, RTL design and functional verification - Experience...
and develop RTL for owned unit and/or feature. Work with verification and physical design teams to ensure that the unit... architecture definition, RTL coding using Verilog or System Verilog. Expertise in using design and verification tools (Synthesis...
, including performance models, RTL test benches ,emulators and silicon to analyze performance and find performance bottlenecks... architecture and design teams to explore architecture trade-offs related to system performance, area, and power consumption...
, Tempus). Implement ECOs for timing fixes and validate changes. Collaborate with RTL, physical design, and DFT teams....Tech/M.Tech in Electrical/Electronics Engineering. Experience: 9–12 years in STA and physical design implementation...
Methodology/Architect/RTL execution Lead for the high-speed SERDES Phys, Next gen Memory Phys and Die-to-Die interconnect IPs... in RTL coding for DFx logic including lock-up latches, clock gates, and scan anchors. Understanding of low-power design...
design fundamentals. Preferably have a deep understanding of ASIC design flow including RTL design, verification, logic... Performance verification and analysis. CPU, Memory controller, Bus Interconnect, Cache coherency IP / SOC Design, Micro...
of different levels of extraction, including performance models, RTL test benches and emulators to find performance bottlenecks... in the system. Work closely with the architecture and design teams to explore architecture trade-offs related to system...
, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions... for high level architecture and micro-architecture development. Design the prototype or experiments for proof of concept...