Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: IP Verification Engineer DFX, Location: San Jose, CA

Page: 1

IP Verification Engineer DFX

your career. THE ROLE: As an IP verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs... for modern, complex IP architectures, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 05 Mar 2026

ASIC DFT Engineer

for test. Responsibilities Own IP DFT architecture, implementation, verification, signoff STA constraints for DFT... Support chip teams on IP DFT integration, pattern verification and ATE bring-up Participate in silicon bring-up...

Company: Broadcom
Location: San Jose, CA
Posted Date: 05 Feb 2026
Salary: $120000 - 192000 per year

Design Engineer Lead

understanding of DFx (test and debug) methodology on IP and chip level Ability to debug complex issues with floor-planning, power... of hardware IP and integration design Led a team of cross-functional engineers across multiple sites/geos Led multiple programs...

Location: San Jose, CA
Posted Date: 24 Feb 2026
Salary: $175000 - 219000 per year