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Keywords: FPGA/ASIC Engineer, Location: San Jose, CA

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FPGA/ASIC Engineer

with at least 8 years of experience in ASIC or a related discipline. A comprehensive understanding of FPGA design, with proven... Engineering with at least 8 years of experience in ASIC or a related discipline. A comprehensive understanding of FPGA design...

Company: Nesco Resource
Location: San Jose, CA
Posted Date: 15 Jun 2025

ASIC Verification Engineer

test scenarios Working on FPGA emulated platforms Working in a Linux environment Using git version control system Using...

Company: Yoh
Location: San Jose, CA
Posted Date: 14 Aug 2025

Senior FPGA Design Engineer

Job Description Senior FPGA Design Engineer position is your opportunity to join one of the industry's leading... Senior FPGA Design Engineer, you will have the opportunity to work in design, verification, debug and system integration...

Company: NR Consulting
Location: San Jose, CA
Posted Date: 10 Sep 2025

Senior FPGA Design Engineer

you to apply for this job. Job Description Senior FPGA Design Engineer position is your opportunity to join one of the industry’s leading companies in platform security.... You should have prior knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado...

Company: Axiado
Location: San Jose, CA
Posted Date: 10 Sep 2025

Senior Design Automation Engineer

and deliver on time results with quality PREFERRED EXPERIENCE: FPGA design knowledge Custom and ASIC design tools and flows..._ THE ROLE: As a Senior design automation engineer in our Adaptive & Embedded Computing Group (AECG) group...

Posted Date: 28 Aug 2025

Design Verification Engineer - SoC Infrastructure

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 21 Aug 2025

Senior Staff Emulation Engineer - ZEBU

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 21 Aug 2025

PCIe Debug Engineer (Gen5/6)

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 21 Aug 2025

Senior RTL Design Engineer

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 21 Aug 2025

Sr. Design Verification Engineer

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

PCIe Debug Engineer (Gen5/6)

to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

Sr. Design Verification Engineer

to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

Senior Staff Emulation Engineer - ZEBU

to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

Design Verification Engineer - SoC Infrastructure

to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

Senior RTL Design Engineer

to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 20 Aug 2025

Functional Verification Engineer - Applying LLMs for Chip Design

in Electrical Engineering, Computer Engineering, or related field. Proven expertise in digital design (RTL/FPGA/ASIC... to cutting-edge AI silicon startups. Position Overview We are seeking a results driven Pre-Silicon Verification Engineer...

Company: ChipStack
Location: San Jose, CA
Posted Date: 12 Aug 2025

RTL Design Engineer

and quality THE PERSON: We are looking for a RTL digital design engineer to join the FPGA Architecture Development group. The... right candidate will focus on full-chip RTL development and integration for next generation FPGA and programmable SoC...

Posted Date: 26 Jul 2025

RTL Design Engineer

and quality THE PERSON: We are looking for a RTL digital design engineer to join the FPGA Architecture Development group. The... right candidate will focus on full-chip RTL development and integration for next generation FPGA and programmable SoC...

Posted Date: 26 Jul 2025

PCIe Verification Engineer

_ THE ROLE: As a verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs for variety... and implementation quality PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Expert in Verilog, System Verilog, Object...

Posted Date: 13 Jul 2025

Digital Design Engineer - New College Grad

protocol Expertise/ understanding in digital designs RTL Exp Hands on experience with complete ASIC flow is required Good... knowledge of Synthesis, DFT and Timing closure requirements. Should have good exposure to the FPGA flow. Should have exposure...

Company: Rambus
Location: San Jose, CA
Posted Date: 12 Sep 2025
Salary: $72200 - 134200 per year