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Keywords: Design-for-Test (DFT) Engineer, Location: Santa Clara, CA

Page: 1

Principal Engineer - Design For Test (DFT)

and implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs The execution involves Design-for-Test... knowledge on various DFT/Test architecture solutions for 2.5D/3D IC design and should be involved in DFT-Architecture definition...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Sep 2025
Salary: $146850 - 220000 per year

Design-for-Test (DFT) Engineer

, secure, and performance-optimized compute. As a Design-for-Test Engineer, you’ll help ensure silicon reliability and debug... with physical design teams to meet DFT constraints Support test pattern generation, debug, and post-silicon validation...

Company: Initio Capital
Location: Santa Clara, CA
Posted Date: 04 Aug 2025

Senior DFT Infrastructure Engineer - GPU

, join our diverse team today. We are now looking for a highly motivated and talented Senior DFT Infrastructure Engineer... and workflows to enable various Silicon bringup and FA teams. What you’ll be doing: Design, develop, test, and deploy internal...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Sep 2025

DFT Engineer - CPU

you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design... Strong fundamentals in digital ASIC design; experience using Verilog or VHDL Experience with ASIC test, DFT, and debug 2+ years...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Jul 2025

Design Verification Engineer

Understanding of Design for Test methodologies and DFT verification experience is a plus Proficient in debugging firmware and RTL...Design Verification Engineer 12 Months Santa Clara, CA Hybrid Role: 2-3 days in Office THE ROLE...

Company: Sunrise Systems
Location: Santa Clara, CA
Posted Date: 28 Sep 2025

Principal Product Engineer

and quality improvements Partner with design, DFT/DFM, process, package, and test teams to optimize product performance, quality... in test methodology, silicon process, package, and DFT/DFM Ability to lead cross-functional initiatives, work independently...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 28 Sep 2025
Salary: $128870 - 193000 per year

ASIC/RTL Design Engineer - Specialized (US)

to understand the new features to be verified Understanding of Design for Test methodologies and DFT verification experience...Job Title: ASIC/RTL Design Engineer Duration: 12+ months Location: Santa Clara, CA Key Responsibilities: Develop...

Posted Date: 27 Sep 2025

Sr. Staff Static Timing Analysis (STA) Engineer

, Design for Test (DFT), and other cross-functional teams across both local and global sites. If you're... Physical Design team at Marvell in Santa Clara is seeking a Sr. Staff Static Timing Analysis (STA) Engineer to contribute...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Sep 2025
Salary: $124420 - 186400 per year

DFX RTL XXgn Engineer - Specialized

Job Description: Pay Range: $82hr - $103hr This is a position for a senior-level RTL design engineer. As a part... Engineer is expected to contribute. Implementation of SOC DFT features (TAP controller, GPIOs, ESD structures, etc.) into RTL...

Company: Cynet Systems
Location: Santa Clara, CA
Posted Date: 24 Sep 2025

Senior Product Development Engineer - Data Center

failures on Automatic Test Equipment (ATE) (Wafer and package level) Lead multi-functional efforts with design, foundry... Experience with ASIC mixed-signal design, characterization and qualification Knowledgeable in DFT and device physics...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Sep 2025

Senior Product Engineer

company. You will work closely with Test, hardware, Design and Firm ware engineering teams to design, develop, and debug... products and solutions. What You Can Expect As a Senior Product Engineer, you will work closely with design, process, DFM...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 18 Sep 2025
Salary: $77340 - 115800 per year

Product Engineer

for Manufacturability (DFM) and Design for Testability (DFT) for new high-density flash storage arrays. Proactively identify and resolve... your mark, come join us. SHOULD YOU ACCEPT THIS CHALLENGE... Pure Storage is seeking a full-time Product Engineer...

Company: Pure Storage
Location: Santa Clara, CA
Posted Date: 17 Sep 2025

Senior Circuit Verification Engineer

of Design-for-test (DFT) is a plus. Proficiency in scripting languages, such as Python, Perl, Shell, Tcl and automation...We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... of DRAM controllers is a plus. Experience with all stages in the ASIC design flow including emulation, prototyping, DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Aug 2025
Salary: $108000 - 184000 per year

Senior Silicon Product Development Engineer

and vendor management. Has a strong grasp of all aspects of GPU characterization, wafer and final test DFT coverage... position within a top-tier organization? In the role of Silicon Product Development Engineer at NVIDIA...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 28 Aug 2025

Interconnect RTL Design Engineer

and analytical skills Exposure to Design for Test, understanding of scan concepts and writing DFT friendly RTL. Working knowledge... has its own custom-designed Infinity Data Fabric, so this role gives an engineer the opportunity to work on a broad array...

Posted Date: 24 Aug 2025

Senior Staff ASIC Product Engineer

Staff ASIC Product Engineer, you will work closely with design, process, DFM/DFT, and test teams. Lead debug.... Work with design and DFT/DFM groups to define and enhance yield and test methodologies. Play a key role in new product...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Aug 2025
Salary: $111780 - 167500 per year

Senior Principal Test Engineer (Hardware-ICT)

product designs of various design complexities for test coverage and serviceability with ICT and boundary scan Drive DfT... manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible...

Location: Santa Clara, CA
Posted Date: 20 Aug 2025

Mechanical Design Engineer (Tooling Design Focus)

Introduction) into global manufacturing environments. Engineer, design, and validate custom tooling, test fixtures, and jigs... of quality and performance in everything we do. Job Description Who You'll Work With As a Mechanical Design Engineer...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 20 Aug 2025
Salary: $100000 - 175000 per year

Senior Circuit Design Engineer

, and understanding of Design-for-test (DFT) is a plus. Proficiency in scripting language, such as, Perl, Tcl, Make and automation...We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Aug 2025