Job Title: Verification Lead UVM / System Verilog / RTL Verification Location: 100% Onsite Austin, TX 12+ Months... Contract Top Must-Have Skills: UVM System Verilog RTL Verification Role Overview: We are seeking a seasoned...
, preferably in communication systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab... a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models · Develop...
. - Lead design of 1 or more DSP data path modules in System Verilog. Able to interpret reference models in MATLAB. - Involve... at Amazon! We're hiring a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team...