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Keywords: Chip Lead, Location: San Jose, CA

Page: 1

Chip Lead

infrastructure layer for the fastest growing industry in history. The Role We are looking for a Chip Lead to take full technical... chip-level perspective. Strong technical judgment and ownership mindset. (Preferred) Prior experience as a Chip Lead...

Company: Etched
Location: San Jose, CA
Posted Date: 17 Jan 2026
Salary: $2000 per month

ASIC Chip Lead

Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of cutting...-edge System-on-Chip (SoC) solutions. This key role requires a deep, end-to-end understanding of the entire ASIC...

Company: Broadcom
Location: San Jose, CA
Posted Date: 17 Dec 2025

Chip Architect - ARM-based SoC Design (Sensing & Touch, Ultra-Low Power)

We are seeking a highly skilled and experienced Chip Architect to lead the definition and documentation... of next-generation ARM-based Systems-on-Chip (SoCs). This role is central to bridging the gap between system requirements and silicon...

Company: Broadcom
Location: San Jose, CA
Posted Date: 26 Nov 2025

Lead Verification Engineer

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Verification... and engineers in the world to develop products that make data faster and safer. As a Lead MTS Verification Engineer, the candidate...

Company: Rambus
Location: San Jose, CA
Posted Date: 23 Nov 2025

Senior Lead Engineer, Software (BMC) 1

/MGR: Individual Contributor Direct/Indirect Indicator: Indirect Summary The Senior Lead Software Engineer designs... a team of engineers. The Senior Lead Engineer, Software will work in cross functional teams with customers, product line...

Company: Celestica
Location: San Jose, CA
Posted Date: 06 Nov 2025

Senior Lead Engineer, Software (BMC) 2

/MGR: Individual Contributor Direct/Indirect Indicator: Indirect Summary The Senior Lead Software Engineer designs... a team of engineers. The Senior Lead Engineer, Software will work in cross functional teams with customers, product line...

Company: Celestica
Location: San Jose, CA
Posted Date: 06 Nov 2025

High Speed Analog Design Lead

architecture and design Lead Definition, review and sign-off on analog/mixed signal IP top level architecture and component..., HBM2/HBM3, gDDR5/gDDR6, …) and chip-to-chip links PHY IPs Strong fundamentals and knowledge of mixed signal circuit...

Posted Date: 06 Nov 2025

Lead Characterization/Test Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Lead... IP R&D Group at Cadence Design Systems. We are looking for a Lead Engineer who will be a key contributor to our advanced...

Posted Date: 30 Oct 2025

Senior Custom ASIC Engineering Lead

Following skills are nice to have: Exposure to SERDES communications protocols. Logic design, chip architecture...

Company: Broadcom
Location: San Jose, CA
Posted Date: 06 Nov 2025

Packaging Technical Leader, Silicon Photonics (HYBRID) 2000935

Packaging Technical Leader to lead the development and integration of advanced packaging solutions for silicon photonics (SiPh... Exceptional ability to work within and lead projects with highly cross-functional and geographically distributed technical teams...

Company: Splunk
Location: San Jose, CA
Posted Date: 26 Jan 2026

ASIC Engineering Technical Leader

: You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test.... You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements...

Company: Splunk
Location: San Jose, CA
Posted Date: 26 Jan 2026

ASIC Design Verification Engineer – Risc V and/or Systolic Array experience required

: Lead comprehensive verification planning and execution for systolic array compute blocks and full-chip designs, ensuring...-class compute block verification, including validation of dataflow, pipeline behavior, and scalability at array and chip...

Company: Yoh
Location: San Jose, CA
Posted Date: 25 Jan 2026

MTS Silicon Design Engineer

to market. As a key contributor, you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip.../formats for simulation. Lead the development of multidimensional designs involving the layout of complex integrated circuits...

Posted Date: 25 Jan 2026

MTS Silicon Design Engineer

. Create block-level verification plan, test plans and full chip test plan. Develop block-level test bench and tests in UVM... closure. Port the block-level tests to full chip test bench. Determine architecture design, logic design, and/or system...

Posted Date: 25 Jan 2026

MTS Silicon Design Engineer

. Determine architecture design, logic design, and/or system simulation. Define module interfaces/formats for simulation. Lead the... or SystemVerilog; C, C++, Perl, Ruby, Makefile, or shell; Design flows and methodologies used for chip verification; Functional...

Posted Date: 25 Jan 2026

SoC Architect (Coherent Interconnect)

Architect to lead the design and development of coherent interconnect architectures for next-generation System-on-Chip (SoC... architectures, including cache coherence protocols, network-on-chip (NoC) designs, and high-speed interface protocols (e.g., AXI...

Company: Samsung
Location: San Jose, CA
Posted Date: 22 Jan 2026

Facility Manager

and products is uniquely tailored to each client, from owners to occupiers, investors to founders, and startups to blue-chip... partners across reception, mailroom, and building services. Create and lead by example a high-functioning, collaborative team...

Company: Newmark
Location: San Jose, CA
Posted Date: 22 Jan 2026
Salary: $95000 - 105000 per year

AI Infrastructure Solution Architect

AI-driven demand is transforming the entire data center value chain-from grid to chip and chip to chiller-especially with high... customers and strengthening our leadership across server vendors, tech aggregators, and chip manufacturers...

Location: San Jose, CA
Posted Date: 20 Jan 2026
Salary: $160800 - 241200 per year

Senior IC Packaging Engineer

goals. Lead chiplet-based packaging strategies, including UCIe, silicon interposers, and advanced RDL. Perform and guide.... Lead external engagement with OSATs, foundries, and key suppliers for technology development and manufacturing readiness...

Company: Axiado
Location: San Jose, CA
Posted Date: 18 Jan 2026

Construction Field Manager

on facilities tailored for the environmental services and transportation sectors. We have active projects with blue chip companies... Responsibilities: May lead and direct the work of subcontractors, project engineers and assistant project managers. Carries out...

Posted Date: 18 Jan 2026