challenging projects and collaborative success. In this role, you will be responsible for full‑chip floorplanning, physical... expertise in physical implementation flows. You have strong experience in full‑chip floorplanning, synthesis, place and route...
, physical design, and DFT teams to ensure timing closure across multiple modes and corners, while maintaining design quality... RESPONSIBILITIES: Timing Constraints Development: Create and validate block-level and full-chip SDCs for functional and test...