Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Sr. RTL Design Engineer, Location: Hyderabad, Telangana

Page: 1

ASIC Digital Design, Sr Staff Engineer - Serdes IP RTL Design

Engineer - Serdes IP RTL Design Hyderabad, Telangana, India Engineering Employee Save Job Share Jump to Overview....Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs ASIC Digital Design, Sr Staff...

Company: Synopsys
Posted Date: 30 Jan 2026

Sr. RTL /FPGA Design Engineer

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification... root cause; work with other RTL and firmware engineers to resolve design defects and correct any test issues Review...

Posted Date: 26 Nov 2025

RTL Design Engineer

your career. RTL DESIGN ENGINEER THE ROLE: We are looking for a Senior Silicon Design Engineer to design and deliver low... with IP vendor, RTL , Verification PD and FW teams. Champion design quality: lint/CDC/DFT readiness, regressions, bug...

Posted Date: 09 Jan 2026

Sr. Lead Engineer - Digital Design

for AI inference performance and efficiency. * RTL Design & Integration: Develop and integrate Register Transfer Level (RTL...Architecture & Microarchitecture Design: Assist in defining and implementing hardware architectures optimized...

Posted Date: 30 Jan 2026

Sr. Lead ASIC design Engineer - Digital Design

architectures optimized for AI inference acceleration * RTL Design & Integration: Develop and integrate Register Transfer Level... (RTL) components for SoCs using industry-standard HDLs (Verilog/SystemVerilog). * Physical Design Support: Collaborate...

Posted Date: 30 Jan 2026

Wireless R&D IP Design Specialist-Sr Engineer/Sr Lead

next-generation Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture... and RTL coding using System Verilog, Verilog, or VHDL. Collaborate with multi-geo teams for design and verification...

Company: Qualcomm
Posted Date: 13 Dec 2025

Sr Staff Engineer, STA/Synthesis

. Implement timing closure strategies, including ECOs, buffer insertion, and cell sizing. Collaborate with RTL, Physical Design...Job Description We are looking for a Staff/Senior Staff Engineer with deep expertise in Logic Synthesis and/Or Static...

Posted Date: 30 Jan 2026

Wireless R&D IP Verification Staff/Sr Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification, including: Design...

Company: Qualcomm
Posted Date: 18 Dec 2025

Wireless R&D IP Verification Sr Lead/Sr Engineer/Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification, including: Design...

Company: Qualcomm
Posted Date: 18 Dec 2025

Sr. Staff Verification Engineer

-signal IP blocks, subsystems, and full integrated circuits. Work closely with design teams to understand micro-architecture... verification reviews. (30%) Design and implement complex testbenches using SystemVerilog and UVM methodology. Perform block...

Posted Date: 05 Nov 2025

Sr. Staff Verification Engineer

-signal IP blocks, subsystems, and full integrated circuits. Work closely with design teams to understand micro-architecture... verification reviews. (30%) Design and implement complex testbenches using System Verilog and UVM methodology. Perform block...

Posted Date: 05 Nov 2025

Sr. Staff Digital Engineer

. Design digital hardware functions and sub/full systems in RTL code using SystemVerilog, Verilog or VHDL. Collaborate... with system design to create digital specification definition. Implement design for testability (scan chain, BIST, boundary scan...

Posted Date: 04 Nov 2025