Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SoC Physical Design Clocking Engineer, Location: Bangalore, Karnataka

Page: 1

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 15 Jan 2026

Senior SoC Physical Design Timing Engineer

to Understanding of Design, Architecture and Clocking, Interaction with FE/DFT/Verification teams, Writing constraints, understanding.../troubleshooting of timing issues in a design. Additional skills include: - Hands-On experience with domain relevant industry standard...

Company: Intel
Posted Date: 04 Feb 2026

Lead Soc Physical verification Engineer

of processing subsystems IP, resulting in meeting the signoff criteria for tapeout. Description SOC Physical Design Engineer... your career. THE ROLE: The focus of this role is to plan, implement, and execute the Physical design and verification...

Posted Date: 24 Dec 2025

Lead SoC Logic Design Engineer

for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design... integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified...

Company: Intel
Posted Date: 06 Feb 2026

Principal Physical Design Engineer

We are seeking a highly skilled and experienced Physical Design Engineer to join our dynamic team. As a key member... successful development of cutting-edge semiconductor products. As a Principal Physical Design Engineer, you will be responsible for Physical...

Company: Microsoft
Posted Date: 15 Dec 2025

Lead Full chip Soc Sign off & EMIR closure Engineer

your career. MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to build, execute, and sign off on the EMIR... at Tile /Partition/Subsytem/SOC levele on a particular node Ownership of EMIR Flow & Signoff Drive EMIR closure for design...

Posted Date: 10 Jan 2026

SMTS Silicon Design Engineer

your career. SMTS Silicon Design Engineer THE ROLE: The Core design and verification team is responsible for development...-clients) and custom designs. The multi-billion gate complexity and high-frequency (GHz) design development gives the learning...

Posted Date: 07 Feb 2026

Lead RTL Design Engineer

in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks... design and development using UVM methodology for IP/Subsystem and SOC. Experience in Microcontroller and Microprocessor...

Posted Date: 30 Dec 2025

Lead MTS Logic Design

Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver... an exceptional Lead MTS Logic Design Engineer to join our MIC IDC Design team in Bengaluru. In this role, you will be working...

Company: Rambus
Posted Date: 06 Feb 2026

Staff Digital Engineer

Job Description We are seeking a highly skilled Staff Digital Design Engineer to join our Memory Interface Devices..., and support physical design for timing and power closure. Support silicon bring-up, debug, characterization, and post-silicon...

Posted Date: 30 Jan 2026

Staff Digital Engineer

. Job Description We are seeking a highly skilled Staff Digital Design Engineer to join our Memory Interface Devices (MID) Business Unit. In this role...-case scenarios, and coverage goals. Perform synthesis, linting, CDC, RDC analysis, and support physical design for timing...

Posted Date: 30 Jan 2026

STA Synthesis Engineer

your career. MTS Synthesis and STA ENGINEER THE ROLE: The focus of this role is to plan and execute the front end... closure. Co-ordinate with design team and PNR teams. Guide team members on technical issues. KEY RESPONSIBILITIES...

Posted Date: 28 Jan 2026

Power, Performance & Silicon Modeling Engineer

your career. UPFM Support: Senior SILICON DESIGN ENGINEER The goal of AMD’s Unified Power Flow Methodology (UPFM..., level shifting, retention, power gating, DVFS). The UPFM team partners closely with front-end, physical design, verification...

Posted Date: 21 Jan 2026

Senior Power & Performance Modeling Engineer (UPFM)

Working knowledge of digital logic design, RTL fundamentals, and physical design constraints. Understanding of clock gating... your career. Role Summary AMD is seeking a highly motivated engineer to drive the next generation of Unified Power-Frequency...

Posted Date: 21 Jan 2026

Senior Manager - ASIC Development Engineering (DFT,MBIST,SCAN)

to join our dynamic team of engineers to develop the next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible... with industry standards and customer needs. Working closely with the Design, Verification, Physical Design & Test Engineering teams...

Company: SanDisk
Posted Date: 28 Jan 2026

High Speed Memory/IO Circuit Lead (Mixed Signal)

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Be part of AMD’s analog/mixed signal IP design team responsible for the... design and development of next generation IOs, high speed memory (gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP...

Posted Date: 19 Nov 2025