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Keywords: Senior RTL Engineer, Location: Bangalore, Karnataka

Page: 4

DFT Verification Engineer

boundaries of what's possible! As a Senior DFT Verification Engineer, you will be part of a team that is at the forefront... in static timing analysis, ECO, ASIC/Logic Design Flow, HDL, and Digital logic design. Experience in RTL and Gates...

Company: Nvidia
Posted Date: 02 Aug 2025

Staff Engineer, Design Verification Engineering

Engineer About the Role As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership... while representing ADI in interactions with key customers and industry partners. This senior position involves significant influence...

Posted Date: 01 Aug 2025

Staff Engineer, Design Verification Engineering

Engineer About the Role As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership... while representing ADI in interactions with key customers and industry partners. This senior position involves significant influence...

Posted Date: 01 Aug 2025

Staff Engineer, Design Verification Engineering

Engineer About the Role As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership... while representing ADI in interactions with key customers and industry partners. This senior position involves significant influence...

Posted Date: 01 Aug 2025

ASIC Design Engineer

of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers... architecture and high-level product requirements. Convert Chip Spec into RTL using internal IPs and external IPs. Review...

Company: Amazon
Posted Date: 01 Aug 2025

Sr. Physical Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... requirements for AMD next generation chips in a fast-paced environment on cutting edge technology. THE PERSON: Engineer...

Posted Date: 13 Jul 2025

Sr. Physical Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... requirements for AMD next generation chips in a fast-paced environment on cutting edge technology. THE PERSON: Engineer...

Posted Date: 13 Jul 2025

ASIC Design Engineer - Security Subsystem

to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for RTL Design.... What you'll be doing: As a senior designer, be responsible for understanding system security concepts and features, make...

Company: Nvidia
Posted Date: 31 Aug 2025

ASIC Design Engineer, BOOT and Power Management

to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for RTL Design... chips. One should possess strong digital design and verification fundamentals. What you'll be doing: As a senior...

Company: Nvidia
Posted Date: 12 Aug 2025

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical... of junior and senior designers. Review and approve specifications, schematics, simulations, and post-layout signoff for high...

Company: Intel
Posted Date: 03 Aug 2025

IP Verification Lead( LPDDR/DDR PHY)

_ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Circuit Technology Group, you will help bring to life cutting... silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate...

Posted Date: 24 Sep 2025

Digital Design Lead

System on Chip (SOC) Digital Design Senior Principal Engineer, who will be responsible for end to end SOC design development... & Area) for the project Design, analyze, develop, and evaluate VLSI components Drive Design process - RTL coding, code...

Posted Date: 19 Sep 2025

GLS Lead

Job Requirements Job Description Job Title: Senior Gate-Level Simulation (GLS) Verification Engineer Location... skilled and meticulous Gate-Level Simulation (GLS) Verification Engineer to serve as the last line of defense before silicon...

Company: Quest Global
Posted Date: 17 Sep 2025

GLS Technical Manager

Job Requirements Job Description Job Title: Senior Gate-Level Simulation (GLS) Verification Engineer Location... skilled and meticulous Gate-Level Simulation (GLS) Verification Engineer to serve as the last line of defense before silicon...

Company: Quest Global
Posted Date: 17 Sep 2025

Associate III - VLSI IO Design

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS...

Company: UST
Posted Date: 13 Sep 2025

SMTS Logic Design

, you’ll report directly to Senior Principal Engineer responsible for the project. Our Retimer group is dedicated to providing... of solid logic design experience. Must have actually done RTL work and not just lint, cdc flow runs. Knowledge of Serdes...

Company: Rambus
Posted Date: 12 Sep 2025

IP Verification Lead

_ MTS SILICON DESIGN ENGINEER THE ROLE: The Infinity Fabric transport layer verification team... is looking for an experienced pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity...

Posted Date: 19 Aug 2025

Associate II - VLSI SC Char

from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 15 Aug 2025

IP Verification Lead

_ MTS SILICON DESIGN ENGINEER THE ROLE: The Infinity Fabric transport layer verification team... is looking for an experienced pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity...

Posted Date: 14 Aug 2025

Techincal Lead- Design Verification

Job Requirements The ideal candidate for this Senior Lead Verification Engineer position... experience, Subsystem Level Verification, Test Plan Writing, Knowledgeable in UVM and System Verilog, Debugging RTL issues...

Company: Quest Global
Posted Date: 13 Aug 2025