your career. SENIOR MANAGER SILICON DESIGN ENGINEER THE ROLE (SOC Lead): Drive and lead end-to-end SOC/ASIC execution working..., Power intent design, RTL Quality checks, Clock, Reset, Fuses, Synthesis, Timing Analysis, Design Partitioning, PPA...
Job Title: Senior Design Verification Architect / Senior Principal DV Engineer Location: [Pune, India ] Role... Overview: We are seeking a highly experienced Design Verification (DV) Architect with 20+ years of expertise to lead...
works exactly as intended. We are looking for a Senior Engineer to lead DFT implementation and drive yield improvement... closely with RTL designers to make the design testable without compromising performance. Key Responsibilities...
for low power and high speed, design for test (DFT) System modeling, RTL coding, Lint / CDC checking, simulation, synthesis... with architecture, physical design, and design teams to lead the implementation of the digital architecture. Develop and refine...
Type Full-time Job Summary We are looking for an experienced DFT Mid Level Engineer to execute Design-for-Test (DFT..., mentor junior engineers, and collaborate closely with design, physical implementation, and EDA vendors to ensure robust...
Job Summary We are looking for an experienced DFT Mid Level Engineer to execute Design-for-Test (DFT) activities for advanced... engineers, and collaborate closely with design, physical implementation, and EDA vendors to ensure robust and manufacturable...
environment using Cadence/Synopsys/Mentor tools Knowledge of digital design techniques, Verilog HDL, and standard RTL coding... styles, as well as analog circuit basics, with previous analog design experience a plus Candidate should be familiar...
up, test and debug Design documentation management . The successful candidate will work closely with a project lead... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...
is a plus. Background in RTL Build and Design Automation is a plus. Ways to stand out from the crowd: Chip lead type of technical... in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical...
Title: Physical Design Lead (PnR, STA) About GlobalFoundries GlobalFoundries is a leading full-service... semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world...
, and external partners Silicon Program Management Lead end-to-end silicon lifecycle programs including architecture, RTL... Hands-on experience with semiconductor design flows (RTL, verification, PD, DFT) Experience with EDA tools, HPC/cloud...
your career. PMTS SILICON DESIGN ENGINEER THE ROLE: AMD is seeking a Principal Member of Technical Staff (PMTS) to lead SoC... as the technical authority for emulation methodology, performance, and debug Influence SoC architecture and RTL decisions...
. Job Description Position Overview: We are looking for a highly skilled and experienced individual for SoC PD lead position for driving SoC... implementation efforts from RTL to GDSII. This role is pivotal within our talented team of engineers, ensuring that we meet our GDS...
and using AMD different profiler/debugger tools. Work directly with architecture, RTL, and design teams to influence fixes... and performance analysis Leadership & Soft Skills Proven technical leadership at Senior/Staff level Ability to lead ambiguous...
. Implement timing closure strategies, including ECOs, buffer insertion, and cell sizing. Collaborate with RTL, Physical Design...Job Description We are looking for a Staff/Senior Staff Engineer with deep expertise in Logic Synthesis and/Or Static...
Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure. Hands-on expertise in integration...
to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification... in RTL design, verification methodologies, and EDA tools is matched by your drive to deliver customer-centric solutions...
Staff AI Methodology Engineer Principal EDA Solutions Engineer AI-Driven RTL-to-GDS Flow Specialist Lead Application.... Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
, MBIST, boundary scan, and test access strategies Drive testability requirements early in the RTL design phase Balance... technical lead for one or more chips Guide and review work of junior and senior DFT engineers Define best practices...
your career. UPFM Support: Senior SILICON DESIGN ENGINEER The goal of AMD’s Unified Power Flow Methodology (UPFM...) is to establish and scale best practices for power intent definition and power-aware design across RTL, implementation, verification...