Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Senior DFT Engineer, Location: Santa Clara, CA

Page: 1

Senior DFT Infrastructure Engineer - GPU

, join our diverse team today. We are now looking for a highly motivated and talented Senior DFT Infrastructure Engineer... infrastructure tools for ATE test vector release and fail analysis/diagnosis flows Work with DFT, ATE bringup, Silicon FA teams...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Sep 2025

Senior DFT Methodology Engineer

of experience in DFT, system architecture, or RTL design. Understanding of fundamental DFT topics, such as, fault modeling, ATPG... platforms. Excellent understanding of MBIST and IOBIST fundamentals. Experience in architecting DFT access mechanisms in 3D...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Jul 2025

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... with internal CAD teams to drive scalable, automated solutions. Co-architect novel DFT strategies alongside VLSI and Product...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Jun 2025

Principal Engineer - Design For Test (DFT)

will be challenging and will require an experienced DFT engineer that can work with existing DFT solutions while also creating new..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Sep 2025
Salary: $146850 - 220000 per year

Senior Circuit Verification Engineer

We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing... of Design-for-test (DFT) is a plus. Proficiency in scripting languages, such as Python, Perl, Shell, Tcl and automation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

Senior ASIC Design Engineer - Circuits

We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit... with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/DFT/LEC/STA) Partner and work with back-end...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 27 Aug 2025

Senior Staff ASIC Product Engineer

motivated, talented Senior Staff ASIC Product Engineer. You will become part of a dynamic product engineering team working... Staff ASIC Product Engineer, you will work closely with design, process, DFM/DFT, and test teams. Lead debug...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Aug 2025
Salary: $111780 - 167500 per year

Senior Principal Test Engineer (Hardware-ICT)

manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible... product designs of various design complexities for test coverage and serviceability with ICT and boundary scan Drive DfT...

Location: Santa Clara, CA
Posted Date: 20 Aug 2025

Senior Circuit Design Engineer

We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team..., and understanding of Design-for-test (DFT) is a plus. Proficiency in scripting language, such as, Perl, Tcl, Make and automation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Aug 2025

Senior Staff Product Engineer

globe. As a Senior Staff Product Engineer, you’ll join a highly skilled and passionate team responsible for the... introduction (NPI) activities including test characterization, yield ramp, and manufacturability. Partner with design, DFT/DFM...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 17 Jul 2025
Salary: $111780 - 167500 per year

Senior ASIC Synthesis Engineer

. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated...: As a Front-End ASIC Synthesis Engineer, you will own RTL synthesis and gate level optimization tasks Collaboration...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Jul 2025

Senior DFX Software Engineer - Machine Learning

We are now looking for a Senior Software Engineer - Design-For-Test. Do you like to think creatively and enjoy solving... and hardware especially involving DFT, failure analysis, and CAD tools Working experience of agentic models / frameworks...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Jun 2025

Senior Logic Design Engineer– Physical Design

We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design... design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Sep 2025

Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic... of DFT logic and experience with DFT timing closure for various modes e.g., scan, BIST, etc. Understanding and timing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Sep 2025

Senior Silicon Product Development Engineer

position within a top-tier organization? In the role of Silicon Product Development Engineer at NVIDIA..., and qualification of BIST and SCAN DFT methodologies. Knowledgeable in advanced Silicon Process technology such as FinFET Hands...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 27 Aug 2025

Senior Reliability Methodology Development Engineer

. What you'll be doing: As a Reliability Engineer at NVIDIA, you will be responsible for ensuring our products and systems operate... flawlessly. Your key duties will include: Collaborate with design, product, and test engineering teams to apply DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 Jul 2025
Salary: $108000 - 172500 per year

Senior ASIC Design Engineer - Hardware

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team..., we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. Get involved in end-to-end cycle...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 Jul 2025

Senior Staff Physical Design Engineer

a Principal Static Timing Analysis (STA) Engineer to contribute to a wide range of innovative projects—from artificial... (PPA) goals. This role involves close collaboration with Physical Design, Design for Test (DFT), RTL Design and other cross...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Jun 2025
Salary: $124420 - 186400 per year

Senior Physical Design Engineer

or Candence Innovus Static timing analysis with Synopsys Primetime. Understanding of DFT and multi-mode timing analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jul 2025

Senior Circuit Design Engineer

circuits, e.g. power gating, decaps, multi-vt is required. Understanding of Design-for-test (DFT) and logic design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Jul 2025