for connectivity RF/Analog system. Successful candidates will be responsible for participating in development of leading-edge ASICs... will have: *RTL Design *ASIC front-end experience *Scripting Languages knowledge (e.g. Perl or Python) Minimum Qualifications...
. What You Can Expect The Senior Staff Engineer will be involved in the full product lifecycle and will carry new products... for design, verification, and validation of these integrated high speed optical components. The team performs system level...
+ years of experience in high-speed analog, mixed-signal, or memory PHY design. LOCATION: Flexible - Bay Area, CA; Boston... your career. THE ROLE: This role offers a rare opportunity for a senior technical leader to shape the future of memory...