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Keywords: Senior ASIC Design Verification Engineer, Location: California

Page: 3

Infinity Fabric Verification Engineer

your career. THE ROLE: The Infinity Fabric transport layer verification team is looking for a senior pre-silicon verification..., complex processor architecture, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 30 Jan 2026

Custom SOC IP Verification Engineer

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions... a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

ASIC/SoC Presales AE

. You Are: You are an experienced ASIC/SoC/Chiplet Architect, Manager or Design Engineer with a strong background in IC Digital, Mixed Signal, or Analog.... They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency...

Company: Synopsys
Location: Sunnyvale, CA
Posted Date: 14 Feb 2026

Senior Technical Staff Engineer - Design for Test

with different teams within the FPGA business unit spanning architecture, ASIC design, verification, physical implementation.../External/job/Senior-Technical-Staff-Engineer---Architect--DFT-Lead-_R430-26-1 The DFT lead works in close partnership...

Company: Microchip
Location: San Jose, CA
Posted Date: 11 Feb 2026

Senior Digital Design Engineer

, measure, and connect. The Position Analog Devices is seeking a senior digital design engineer for its Data Center & Energy... for mixed-signal SoCs that enable signal measurement and analytics. This role focuses on RTL development, verification...

Company: Analog Devices
Location: Santa Barbara, CA
Posted Date: 07 Feb 2026

FPGA Senior Design Engineer

and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in the architecture, design...-architecture definition to RTL implementation using Verilog/SystemVerilog or VHDL. Design & Architecture: Define, architect...

Company: Cisco Systems
Location: Milpitas, CA
Posted Date: 26 Jan 2026

Senior Mask Layout Design Engineer

Are you a Mask Layout Design Engineer who is seeking an outstanding opportunity? We are looking for a Senior Mask... Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling high...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Analog Design Engineer

Job Description: Senior Analog Design Engineer Architect I - Embedded Hardware Who We Are: Born digital, UST... across the world. Visit us at UST.com. You Are: We are looking for a hands-on senior-level engineer with good analog mixed...

Company: UST
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... etc. Deep understanding of ASIC design flows and methodology Strong analytical and interpersonal skills, excellent teammate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior Design Engineer – AI SoC Development

of AI hardware. Role Overview As a Senior SoC Design Engineer, you will be responsible for defining, implementing, and validating.... You will collaborate across architecture, verification, and physical design teams to deliver high-quality silicon for next-generation...

Company: Intel
Location: Folsom, CA
Posted Date: 24 Dec 2025

Senior Mask Design Engineer - Hardware

role? We are looking for a Senior Mask Layout Design Engineer! Someone who is excited to join a growing and multifaceted..., to amplify human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Dec 2025
Salary: $124000 - 195500 per year

Senior Design Engineer – AI SoC Development

while ensuring design integrity for physical implementation. Working closely with verification teams, you'll review verification... Collaborate closely with verification teams to ensure comprehensive coverage and robust validation of all design aspects...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Feb 2026

Senior Principal Engineer, Physical Design

Expect As a senior leader in the central physical design team, you will: Shape the long-term vision for physical design... experience in back-end physical design and verification, including significant leadership roles Proven track record of leading...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior SRAM Circuit Design Engineer

, and develop in-house design and verification flows for SRAM design that would be used on all the NVIDIA products. What you'll... be doing: Work on the state of the art processor design in advanced technologies, and on the design, verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior Staff Engineer, Physical Design

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $89360 - 133900 per year

Digital Design Engineer

, Linux/Unix environment, and basic C/C++ programming Understanding of ASIC design flow Design for verification...Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an entry level Digital Design Engineer...

Company: Rambus
Location: Agoura Hills, CA
Posted Date: 12 Feb 2026
Salary: $88600 - 164600 per year

Sr. Physical Design Methodology Engineer, Annapurna Labs

technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies... and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes Drive...

Company: Amazon
Location: Cupertino, CA
Posted Date: 11 Feb 2026

Principal FPGA / RTL Design Engineer - Signal Processing

/ RTL Design Engineer- Signal Processing who will report to the Senior Engineering Director in Irvine and work closely... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation...

Location: Irvine, CA
Posted Date: 21 Dec 2025
Salary: $165000 - 250000 per year

Digital Design Engineer

, Linux/Unix environment, and basic C/C++ programming Understanding of ASIC design flow Design for verification...Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an entry level Digital Design Engineer...

Company: Rambus
Location: Agoura Hills, CA
Posted Date: 24 Nov 2025
Salary: $83400 - 154800 per year