and beyond Drive and implement best SoC design methodology/practices and scale it across different business lines. Signing off RTL..., timing constraints, CDC, RDC and work with different functions like verification, DFT, synthesis, etc. to get to a production...
including: Test architecture definition. Identifying and implementing RTL changes for DFT. Performing scan insertion, LEC... models. Boundary scan, ACJTAG, IEEE 1500 implementation and verification. IEEE1687 (iJTAG) compliant ICL/PDL for functional...
physical implementation steps including floor planning, place and route, power/clock distribution, physical verification... nodes Has solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design...
design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation.... Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical...
design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation.... Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical...
design capabilities and infrastructure in alignment with company-wide technology strategy. Lead RTL-to-GDSII implementation... closure, power/signal integrity signoff, and physical verification (DRC/LVS). Provide strategic leadership and technical...
, static timing, physical verification) using industry standard EDA tools. Work with RTL design teams to drive assembly...: Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration...
running RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip, analyzing... analysis tools like Voltus or PrimeRail is advantageous. Working knowledge of physical verification and formal verification...
best practices and innovation. Mentor and guide team members on architecture, RTL design, and verification strategies. Coordinate... Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture and RTL...
protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts Good knowledge of RTL development and verification Hands-on experience... Responsible for specification, Micro-Arch, design and verification of interconnect and related IP's Actively work with SoC...
will be working on SV/UVM based CRV environment which involves RTL, RTL-PA (UPF) verification. It involves understanding the spec... Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component...
. Job Description Experience in ASIC verification, Expertise in System Verilog and UVM, Verilog. · Experience in IP level verification, testbench... Experience in Gate level simulations. · The candidate should be able to define verification plan, create testbenches, testcases...
with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...
, Register Transfer Level (RTL) design, synthesis/Lint/CDC/FEV and System on Chip (SOC) integration on different subsystems.... Throughout the program you will be interacting with various teams, including architecture, verification, and physical design...
Design and develop RTL in Central Engineering team for products which includes blocks such as wakeup sequencing..., calibration logic, I3C/I2C protocol, interrupt controller, EEPROM, MCU integration etc. Work with Pre/Post-silicon verification...
will be working on SV/UVM based CRV environment which involves RTL, RTL-PA (UPF) verification. It involves understanding the spec... Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component...
scan structures Lead efforts in performing DFT rule checks (DFT DRC) at RTL and netlist levels to ensure compliance... gate-level simulations with and without SDF. Partner with the verification team to define and execute DFT verification...
methodologies using Python/TCL maintain and enhance internal DFT methodology. Interface with RTL, STA, PD, verification... BIST architectures. Verification: VCS/VSIM-based DFT RTL and GLS simulations (0-delay and SDF), fault simulation and coverage analysis...
, hierarchical flows, SSN/IJTAG). Lead cross‑functional collaboration with RTL, synthesis, physical design, verification... for embedded instrumentation. SpyGlass DFT rules for design quality and testability compliance. Solid understanding of RTL...
of reference vectors for pre-Si RTL verification of the PHY blocks and working with the PHY design team to complete design... verification. Collaborating with RF and Analog design teams in creation of the specs of the RF and modelling it in the simulation...