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Keywords: RTL Engineer Lead, Location: Santa Clara, CA

Page: 2

Senior Circuit Design Engineer

We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence... the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Principal Digital IC Design Engineer

Engineer within Custom Silicon Engineering (CCS), you will be part of a high-performance RTL team responsible for architecting... schedules, silicon bring-up, and product qualification. What You Can Expect Lead micro-architecture and RTL development...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Oct 2025
Salary: $146850 - 220000 per year

Digital IC Design Staff Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Staff... Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Oct 2025
Salary: $105470 - 158000 per year

Sr. Staff Static Timing Analysis (STA) Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Design Center Engineering... Physical Design team at Marvell in Santa Clara is seeking a Sr. Staff Static Timing Analysis (STA) Engineer to contribute...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 26 Sep 2025
Salary: $124420 - 186400 per year

Digital Design Engineer, Principal

Engineer, you will be at the forefront of innovation—driving micro-architecture and RTL development while spearheading HW/SW..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Switch Business Unit in Marvell...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025
Salary: $146850 - 220000 per year

Principal Verification Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact PHY verification group works closely..., including reference models and bus-functional monitors and drivers. Work closely with architects/RTL engineers to bring-up...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 14 Dec 2025
Salary: $146850 - 220000 per year

Senior Principal Engineer, Physical Design

capabilities and infrastructure in alignment with company-wide technology strategy Lead RTL-to-GDSII implementation for multiple..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior Staff Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise... across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner Implement...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise... running RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip, analyzing...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $89360 - 133900 per year

Principal DSP Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Architecture team leads... and digital designers. Create DSP and FEC hardware block specifications appropriate for RTL implementation. Perform research...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 28 Nov 2025
Salary: $154240 - 231000 per year

Power Methodology Engineer, Data Center Hardware IPs

your career. THE ROLE: A senior power lead for power architecture solutions, specializing in areas like microprocessors, GPUs... applications. Power Optimization: Estimate and analyze power consumption at various stages of chip design (architecture, RTL...

Posted Date: 26 Nov 2025

Senior Principal Digital IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state.... Implement designs using good RTL coding and low power techniques. Collaborate with the backend team to close on synthesis...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025