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Keywords: RTL Engineer, Location: Mountain View, CA

Page: 1

RTL Engineer

to Skip to Content Link Search Jobs Job Description Apply now Start Please wait... Job Title: RTL Engineer Req....com. Job Description: RTL Engineer Profiles with 8 to 12 years Exp only NO 15+ yrs profiles Ask for writeup from candidates on below :- 1...

Company: Wipro
Location: Mountain View, CA
Posted Date: 26 Oct 2025
Salary: $60000 - 135000 per year

Wireless RTL Design Engineer

team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration.../C system model RTL logic design and verification support Running tools to ensure lint-free design Collaboration...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 25 Oct 2025
Salary: $126800 - 190900 per year

RTL Design Engineer

following characteristics and skills: What will you do: Write and develop RTL code in Verilog, System Verilog, or High-Level...

Company: Quest Global
Location: Sunnyvale, CA
Posted Date: 15 Oct 2025
Salary: $150000 - 170000 per year

Contract Hardware Engineer Mid

FPGA Design Engineer Remote role 12 month contract What You'll Be Doing: Strong expertise on Arteris Design... satisfaction. Reporting to customers on daily or weekly progress effectively. What We Are Looking For: Develop and test RTL...

Posted Date: 29 Oct 2025

ASIC Engineer, Power

“Apply to Job” online on this web page. ASIC Engineer, Power Responsibilities Develop power vectors for estimation and optimization... years of experience in the following: C, C++, Java, TCL, and Python Programming Writing RTL code using Verilog...

Company: Meta
Location: Sunnyvale, CA
Posted Date: 26 Oct 2025

SoC Integration Engineer

spanning RF/Analog architecture and design, Systems/PHY/MAC architecture, and design, VLSI/RTL design and integration... Integration Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators and multiple ARM...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 22 Oct 2025

Digital Design Engineer

of experience as a Digital Design Engineer Experience in RTL coding, synthesis and/or SoC Integration Experience in digital...As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers...

Company: Meta
Location: Sunnyvale, CA
Posted Date: 19 Oct 2025

Wireless SOC Verification Engineer

of multi-chip SOC debug architecture. As a Design Verification Engineer on our team, you'll be at the center of the.... This position comes with responsibility for pre-silicon RTL verification of block and top-level SOC, all aspects of SOC Design...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 12 Oct 2025

High-Speed Analog EDA/CAD Engineer

per week and for meetings as needed Seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip..., Virtuoso AMS, Mentor Calibre, Skill language, is a must. General understanding of digital physical design flows, e.g. RTL...

Company: LanceSoft
Location: Sunnyvale, CA
Posted Date: 10 Oct 2025

High-Speed Analog EDA/CAD Engineer

per week and for meetings as needed Seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip..., Virtuoso AMS, Mentor Calibre, Skill language, is a must. General understanding of digital physical design flows, e.G. RTL...

Company: LanceSoft
Location: Sunnyvale, CA
Posted Date: 09 Oct 2025

FPGA Engineer

Position Title: FPGA Engineer Position Description: Protingent Staffing has an exciting contract opportunity located... development phases of uArchitecture > RTL Design-Physical Implementation-Timing Closure–Simulation Validation– Lab Based...

Company: Protingent
Location: Sunnyvale, CA
Posted Date: 04 Oct 2025

Physical Design Engineer, Machine Learning

of revolutionary Apple products. We are looking for a forward-thinking and unusually talented engineer. As a member of our dynamic... flow including RTL design, logic synthesis, floor planning, power/clock distribution, place and route, timing/noise...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 19 Sep 2025
Salary: $126800 - 190900 per year

Sr. ASIC Modem Design Engineer, Project Kuiper

at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry... specification to RTL to optimizing timing / power to chip level validation. · Develop solutions optimizing customer experience...

Company: Amazon
Location: Sunnyvale, CA
Posted Date: 12 Sep 2025

FPGA Verification Engineer

Job Description: FPGA Verification Engineer Technical Lead II – VLSI Who We Are: Born digital, UST transforms... across the world. Visit us at UST.com. You Are: We are seeking a highly motivated and skilled FPGA Verification Engineer...

Company: UST
Location: Mountain View, CA
Posted Date: 04 Sep 2025
Salary: $101000 - 152000 per year

Physcial Design Engineer

Job Requirements We are looking for a Senior Physical Design Engineer with 8–14 years of experience to lead... and execute RTL to GDSII implementation for low power SoCs on advanced nodes. This role demands deep expertise in Synopsys Fusion...

Company: Quest Global
Location: Sunnyvale, CA
Posted Date: 08 Aug 2025

Contract Hardware Engineer Mid

. What We Are Looking For: Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred) Develop and maintain build... and development Experience with RTL to GDS flows on modern processes like TSMC N7 Experience with serial interfaces like SPI, I2C...

Company: LanceSoft
Location: Mountain View, CA
Posted Date: 30 Oct 2025

Contract Hardware Engineer Mid

. What We Are Looking For: Develop and test RTL modules on AMD/Xilinx FPGA devices (required) and ASIC targets (preferred) Develop and maintain build... and development Experience with RTL to GDS flows on modern processes like TSMC N7 Experience with serial interfaces like SPI, I2C...

Company: LanceSoft
Location: Mountain View, CA
Posted Date: 29 Oct 2025
Salary: $70 - 78 per hour