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Keywords: RTL Design Engineer (ASIC, IP Design), Location: Bangalore, Karnataka

Page: 4

Lead DFT Engineer

We are seeking an experienced Lead DFT Engineer to drive the integration and optimization of Design-for-Test (DFT) architecture.... Own DFT planning, insertion, verification, and validation processes. Collaborate with RTL Design, Physical Design...

Posted Date: 30 Sep 2025

Emulation Engineer_Zebu

with traditional simulation. Key responsibilities would include: Porting and compiling ASIC/IP RTL (written in languages...Job Requirements The core responsibility of an emulation engineer is to verify and validate complex chip designs...

Company: Quest Global
Posted Date: 27 Sep 2025

Senior DFT Engineer

. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning... leadership in taking chips from design to volume production. As a Senior DFT Engineer, you will be both the technical owner...

Company: Amazon
Posted Date: 30 Aug 2025

Verification Engineer - HWPM

where everyone is inspired to do their best work. The HWPM Team at NVIDIA is seeking an excellent ASIC Verification Engineer to drive high...-quality, robust verification of system-level IP across unit, subsystem, and SoC levels. This role is ideal...

Company: Nvidia
Posted Date: 25 Jul 2025

NPU Performance and power modelling Staff/Sr Staff Engineer

of complex Qualcomm propriety DSP IP DSP design team is responsible for delivering high-performance DSP cores which are at the... performance verification/correlation of DSP IP by working with global DSP design team involving architecture, implementation, post...

Company: Qualcomm
Posted Date: 05 Sep 2025

Emulation Lead Engineer, Senior

General Summary: Job Summary: 6-10 years of experience in Emulation of complex Qualcomm propriety DSP IP DSP design team... of Digital Design, RTL design, improving model performance and Processor Architecture Strong troubleshooting, analytical...

Company: Qualcomm
Posted Date: 05 Sep 2025

Senior Staff Engineer-PD

role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 31 Aug 2025

Staff Engineer Verification

Verification Requirements creation at IP/SoC level as per the design requirements and UVM Test benches creation... IPs/SoCs Verification Requirements creation at IP/SoC level as per the design requirements and UVM Test benches creation...

Company: Infineon
Posted Date: 10 Aug 2025

Staff DFT Engineer

. Collaborating with RTL Design, Physical Design teams and ASIC vendors to ensure proper test implementation for automotive grade SoC... you will integrate and Optimize Design-For-Test architecture in our LiDar SoCs. What you'll do Responsible for Defining, Developing...

Company: Aeva
Posted Date: 01 Aug 2025

SV UVM

Job Requirements Design Verification Engineer Job Description Job Summary We are seeking a talented and detail...-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role in ensuring the...

Company: Quest Global
Posted Date: 27 Sep 2025

SV UVM

Job Requirements Design Verification Engineer Job Description Job Summary We are seeking a talented and detail...-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role in ensuring the...

Company: Quest Global
Posted Date: 17 Sep 2025

DV SV UVM

Job Requirements ob Title Design Verification Engineer Job Description Job Summary We are seeking a talented... and detail-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role...

Company: Quest Global
Posted Date: 04 Sep 2025

CPU/GPU Performance Modelling

through modeling and RTL simulation. This role will involve working with SoC, IP & Model architects to evaluate and debug CPU... and performance evaluation Experience with ASIC HW design and verification languages/tools (Verilog, System Verilog, System C, OVM...

Posted Date: 07 Aug 2025