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Keywords: RTL Design Engineer, Location: San Jose, CA

Page: 2

Physical IC Design Engineer

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves... Design aspects of taking RTL to silicon tape-out. Responsibilities include, but are not limited to the following...

Company: Broadcom
Location: San Jose, CA
Posted Date: 10 Dec 2025
Salary: $120000 - 192000 per year

Design Verification Engineer

, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team... responsible for state-of-the-art subsystem development to meet customer requirements. The engineer will be responsible...

Company: Broadcom
Location: San Jose, CA
Posted Date: 21 Nov 2025

Design Verification Engineer

, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team... responsible for state-of-the-art subsystem development to meet customer requirements. The engineer will be responsible...

Company: Broadcom
Location: San Jose, CA
Posted Date: 21 Nov 2025

IC Design Engineer

Job Description: IC Design Engineer Participate in IP level architectural definition including micro-architecture... definition Perform RTL design using Verilog HDL, with an emphasis on performance and area Implement multi-power and low-power...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Nov 2025

STA ASIC Design Engineer

your career. THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs..., be familiar with enhancing various RTL quality metrics for complex, hierarchical designs, and be able to automate these processes...

Posted Date: 19 Oct 2025

Digital Design Engineer - New College Grad

an exceptional MTS Digitan Design Engineering to join our Memory Interface Chip team in San Jose. In this role, you will be working... an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities: Work with analog/digital design team...

Company: Rambus
Location: San Jose, CA
Posted Date: 23 Nov 2025
Salary: $93000 - 172000 per year

Physical Design Engineer

Perform physical design of 2nm/3nm/5nm mutli-GHz IP for network switch products. Be able to come up with floorplan..., powerplan, cts and routing of the design using state-of-art EDA tools like Innovus. Work closely with designers and must be able...

Company: Broadcom
Location: San Jose, CA
Posted Date: 20 Nov 2025
Salary: $120000 - 192000 per year

R&D ENGINEER IC DESIGN

, design, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used... in Broadcom’s market leading network switch products. Responsibilities include: High quality micro-architecture and design...

Company: Broadcom
Location: San Jose, CA
Posted Date: 12 Nov 2025

SerDes Applications Design Engineer

RESPONSIBILITIES: Excellent working knowledge of RTL-based design flows Strong knowledge of firmware and hardware interaction... as well as collaboratively with engineers across a variety of AMD design, verification, and validation teams. KEY...

Posted Date: 08 Nov 2025

Silicon Design Verification Engineer

: You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills... Define test plans, test benches, and tests using System Verilog and UVM Debug RTL and Gate simulations and work with HW...

Posted Date: 24 Oct 2025

Sr Principal Product Engineer – Memory IP

. About Us Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise.... We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Our customers...

Posted Date: 23 Nov 2025

Lead Application Engineer

in-depth technical assistance in collaboration with R&D to help support advanced verification flows to secure design wins..., Engineering, or related field Strong RTL and Testbench debug skills Experience in synthesizable coding style Experience...

Posted Date: 05 Dec 2025
Salary: $102900 - 191100 per year

Digital Signal Processing Engineer

Broadcom is looking for a digital signal processing engineer. In this highly visible role, you will be designing... signal processing design for SerDes and serial link high-speed data center networking. Deep understanding of DSP based...

Company: Broadcom
Location: San Jose, CA
Posted Date: 24 Dec 2025
Salary: $120000 - 192000 per year

Silicon Validation Engineer 4

Design Validation engineer, you will have an opportunity to learn and train yourself on how to validate one/or many of the... in FPGA on board level to ensure functionality and performance aspect of Design intent. FPGA consists of various IPs...

Location: San Jose, CA
Posted Date: 23 Dec 2025
Salary: $144000 - 180000 per year

Staff Engineer Digital Signal Processing

Automotive Ethernet/SerDes research and development with Design and simulation Provide the DSP spec and RTL validation support...'s technology. As a Staff Engineer Digital Signal Processing on our Research & Development team, you'll have the opportunity...

Company: Infineon
Location: San Jose, CA
Posted Date: 10 Dec 2025

FAE / Application Engineer

We are seeking an experienced FAE / Application Engineer to support global customers in the semiconductor design... independently. Understanding of APR/physical design flows. Proficiency in RTL / Verilog. Experience with CAD, Functional ECO...

Posted Date: 05 Dec 2025

Embedded Adaptive Hardware Engineer

Design Engineer Location: San Jose, CA (Hybrid) Time Type: Full time Job Type: Regular Hiring Manager: Fang-Li Yuan... architecture, specifications, user guides, and design process Upgrading eFPGA architecture and RTL for the advanced features...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 09 Nov 2025

Post-Silicon Validation Engineer

debug. Diagnose complex silicon issues across RTL, firmware, and hardware layers. Collaborate with design, verification...Post-Silicon Validation Engineer About Etched Etched is building AI chips that are hard-coded for individual model...

Company: Etched
Location: San Jose, CA
Posted Date: 11 Oct 2025

STA Engineer

) Strong understanding of ASIC design flows, including RTL and place-and-route. Excellent problem-solving skills and attention to detail...Broadcom is looking for a senior level STA engineer. In this highly visible role, you will be contributing to highly...

Company: Broadcom
Location: San Jose, CA
Posted Date: 10 Oct 2025
Salary: $120000 - 192000 per year

ASIC Engineer Sr Staff

Design-for-Test (DFT) Engineer to join our team and contribute to the development of advanced 3nm and beyond networking... with RTL and physical design teams to integrate scan, compression, boundary scan, and MBIST features. Develop and validate...

Posted Date: 07 Oct 2025