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Keywords: RTL Design Engineer, Location: India

Page: 23

Physical Verification Engineer

of physical design verification(PDV) checks eg LVS, DRC, ERC , soft check, PERC & DFM o Ability to debug and fix PDV issues eg... level run setup, analysis & signoff with vector(RTL & GLS) and vectorless method. o Ability to run full chip...

Company: Quest Global
Posted Date: 05 Feb 2026

ASIC Engineer

Define, design and develop emulation environments needed for complex, large scale networking ASICs. Develop the... to different aspect of ASIC verification for bug free Silicon Collaborate closely with the design team and the hardware team...

Company: Cisco Systems
Posted Date: 05 Feb 2026

Engineer 2, Software Development & Engineering

Jest / RTL (React Testing Library) AWS Docker & Kubernetes CI/CD pipeline Experience developing Content Management Systems... specialty. Displays knowledge of and ability to apply, process design and redesign skills. Displays in-depth knowledge...

Company: Xfinity
Posted Date: 05 Feb 2026

Principal SOC DV Engineer

Interact with Architecture/Design/FW teams to identify actual FW implementation and perform verification accordingly Develop... developed ASIC test FW on RTL simulations, Netlist simulations and Emulation platforms. Bachelors/Masters in Engineering...

Company: Micron
Posted Date: 05 Feb 2026

Synthesis Engineer, Sr Lead

General Summary: Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization... and netlist Signoff flows Provide implementation flows support and issue debugging services to SOC design teams across various...

Company: Qualcomm
Posted Date: 04 Feb 2026

Senior Lead FPGA Engineer

requirements. Expert in RTL Design using VHDL or Verilog Should be able to create / review FPGA architecture document, Detailed... design documents, Timing Diagrams, State Machine Diagrams etc Good understanding of FPGA Internals – Internal Memory...

Posted Date: 03 Feb 2026

Senior Application Engineer - Prototyping

Knowledge of test bench acceleration, ICE and co-model solutions Highly proficient in HDLs (Verilog/SV) for RTL design and HVLs...Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies...

Company: Siemens
Posted Date: 31 Jan 2026

Lead Engineer - AMSDV

and extract related main functionality. 4. Familiar with Verilog based RTL coding and ASIC design methodology. 5. Experience..., vManager, IMC 3. Ability to read analog schematics and extract related main functionality. 4. Familiar with Verilog based RTL...

Company: Quest Global
Posted Date: 30 Jan 2026

Lead Formal Verification Engineer

closely with architects, RTL designers, and validation teams. Key Responsibilities Formal Verification & Proof Development... vs. dynamic methodologies. Collaboration & Debugging Work with architects, RTL designers, and verification teams...

Posted Date: 29 Jan 2026

NPU/AI Processor Synthesis Sr Staff Engineer

for PPA (Performance, Power, Area), and collaborating with architecture, RTL, and physical design teams to ensure high-quality...-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design...

Company: Qualcomm
Posted Date: 29 Jan 2026

DFT Engineer

with static timing Analysis, ECO, ASIC/Logic Design Flow, HDL and Digital logic design. Experience in RTL and Gates verification... and see how you can make a lasting impact on the world! Design-for-Test Engineering at NVIDIA works on groundbreaking innovations...

Company: Nvidia
Posted Date: 29 Jan 2026

Sr. ASIC Engineer (UVM | System Verilog | Scripting) - 8+ Yrs , BLR

and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and advised... stimulus. Ensure complete verification coverage through implementation and review of code and functional coverage. Ensure RTL...

Company: Cisco Systems
Posted Date: 26 Jan 2026

ASIC DFT Engineer

testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the... Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various...

Company: Cisco Systems
Posted Date: 26 Jan 2026

DFT Engineer

with static timing Analysis, ECO, ASIC/Logic Design Flow, HDL and Digital logic design. Experience in RTL and Gates verification... and see how you can make a lasting impact on the world! Design-for-Test Engineering at NVIDIA works on groundbreaking innovations...

Company: Nvidia
Posted Date: 26 Jan 2026

Dtech Timing Methodology Engineer

/Python. · Cross-Functional Collaboration: Work closely with design, DFT, synthesis, technology, CAD and physical... Flow: Handle timing ECOs (DMSA, tweaker, PrimeClosure) and logical equivalence checks (RTL to Netlist) Minimum...

Company: Qualcomm
Posted Date: 24 Jan 2026

PD Senior Engineer

. Contribute to the design and closure of the subchip and individual blocks from RTL-to-GDS. Collaborate with RTL/Design... design. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer...

Company: Quest Global
Posted Date: 20 Jan 2026

Post Silicon Validation Engineer

Perform deep root-cause analysis across RTL, micro-architecture, firmware, BIOS, and OS layers Firmware, BIOS & OS Bring-Up... and enhance based on design requirements to stress critical hotspots Leverage pre-silicon assets (simulation, emulation, FPGA...

Posted Date: 18 Jan 2026

Sr. Verification Engineer

Job Description: We are looking for highly skilled and efficient Design Verification engineers for the High Speed..., verification and coverage closures of RTL mainly dealing with Ethernet, SerDes interfaces, based on UVM methodology Identification...

Company: Broadcom
Location: India
Posted Date: 17 Jan 2026

IP/SOC Verification Engineer/Lead

and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams...Job Details: Job Description: Performs functional verification of IP logic to ensure design will meet specification...

Company: Intel
Posted Date: 15 Jan 2026

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 15 Jan 2026