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Keywords: RTL Design Engineer, Location: Cupertino, CA

Page: 1

RTL Design Engineer

hardworking RTL Design Engineer. Are early in your journey towards a chip design career and wish to challenge yourself... of mixed signal concepts, RTL design, Verilog and SystemVerilog Deep knowledge of front-end tools (Verilog simulators, linters...

Company: Apple
Location: Cupertino, CA
Posted Date: 23 Oct 2025

RTL Design Engineer

hardworking RTL Design Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft... of RTL design fundamentals Deep knowledge of Verilog and System-Verilog Deep knowledge of front-end tools (Verilog...

Company: Apple
Location: Cupertino, CA
Posted Date: 22 Oct 2025

Mixed-Signal Clocking and Control RTL Design Engineer

Clocking and Control RTL Design position on our team. As a valued member of this group, you will have the opportunity... and phase interpolators. The logic design will involve working with multiple clocks, complex clock domain crossings, signal...

Company: Apple
Location: Cupertino, CA
Posted Date: 22 Oct 2025

DDR Design Engineer

outstanding PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved... assertions, for the design. Formal tools and static checkers will be used to guarantee RTL quality. Supporting design...

Company: Apple
Location: Cupertino, CA
Posted Date: 31 Oct 2025

Timing Design Engineer

to achieve sign-off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock... join something - you'll add something. Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects...

Company: Apple
Location: Cupertino, CA
Posted Date: 30 Oct 2025

ASIC Design and Integration Engineer

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic.... Description Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog...

Company: Apple
Location: Cupertino, CA
Posted Date: 29 Oct 2025

ASIC Design and Integration Engineer

Apple's Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic.... Responsibilities Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog...

Company: Apple
Location: Cupertino, CA
Posted Date: 29 Oct 2025

ASIC Design Engineer - Pixel IP DMA

products to millions of customers quickly. Description As a Pixel IP DMA Design Engineer in the Pixel IP team... and building RTL designs - Working with design verification and formal verification teams to verify functionality and performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 25 Oct 2025

Physical Design Engineer

. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL... hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft...

Company: Apple
Location: Cupertino, CA
Posted Date: 24 Oct 2025

Physical Design Engineer

. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL... hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft...

Company: Apple
Location: Cupertino, CA
Posted Date: 24 Oct 2025

Physical Design Engineer

. Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL... hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft...

Company: Apple
Location: Cupertino, CA
Posted Date: 22 Oct 2025
Salary: $126800 - 190900 per year

Design for Test Engineer

's customers every single day. Apple is looking for a talented and motivated Design for Test engineer to be apart of a highly... design and timing closure on large complex designs • SOC IP integration and RTL Design for performance, low area, and low...

Company: Apple
Location: Cupertino, CA
Posted Date: 22 Oct 2025
Salary: $121300 - 183200 per year

ASIC Design Engineer - Pixel IP DMA

products to millions of customers quickly. Description As a Pixel IP DMA Design Engineer in the Pixel IP team... and building RTL designs - Working with design verification and formal verification teams to verify functionality and performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 18 Oct 2025

Custom Logic Design & STA Engineer

for a self-motivating engineer for the role of Custom Logic Design and STA engineer. As a member of the team, we will be working... transistor- and gate-level custom digital circuits in mixed-signal chips. Work with RTL and custom design teams on timing...

Company: Apple
Location: Cupertino, CA
Posted Date: 17 Oct 2025

Semiconductor Design Engineer

Title: Semiconductor Design Engineer Location: Cupertino, CA (5x/ week onsite) Salary Range: Competitive, based... Verilog, RTL Design, and Custom SoC Strong understanding of Digital Design Concepts and Semiconductor design principles 4...

Posted Date: 17 Oct 2025

Custom Logic Design & STA Engineer

for a self-motivating Engineer for the role of Custom Logic Design and STA Engineer. As a member of the team, we will be working... transistor- and gate-level custom digital circuits in mixed-signal chips. Work with RTL and custom design teams on timing...

Company: Apple
Location: Cupertino, CA
Posted Date: 12 Oct 2025

SoC Design/Integration & Synthesis Engineer

design, writing UPFs, close on power intent verification at the chip level. - Work on RTL integration, timing constraints... with scripting languages like Perl or Tcl or Python RTL logic design or implementation experience on multi-million gate ASICs...

Company: Apple
Location: Cupertino, CA
Posted Date: 09 Oct 2025

Sr. Physical Design Engineer, Annapurna Labs

Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right... with other physical design engineers as well as with the RTL/Arch. teams About the team Inclusive Team Culture Here at AWS, we embrace...

Company: Amazon
Location: Cupertino, CA
Posted Date: 13 Sep 2025

Semiconductor Design Engineer

, System Verilog, RTL Design, Custom SoC, and Digital Design. 4 to 7 Years of Experience needed Skills and Qualifications..., and manufacturing processes. Proficient in RTL design using Verilog and System Verilog. Experience with complex designs and protocols...

Posted Date: 17 Oct 2025

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team

of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design....S. in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years...

Company: Amazon
Location: Cupertino, CA
Posted Date: 11 Sep 2025