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Keywords: Principal Engineer, ASIC Development Engineering (RTL Design), Location: Bangalore, Karnataka

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Principal Engineer, ASIC Development Engineering (RTL Design)

. Job Description About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System... Responsibilities: Define and review SoC architecture and design specifications. Develop high-quality RTL which is synthesizable...

Company: SanDisk
Posted Date: 28 Jan 2026

Sr Principal ASIC / RTL Design Engineer

years of experience in RTL design/development Experience in working and leading Digital Design, Architecture and ASIC/Mixed... project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R...

Company: onsemi
Posted Date: 24 Jan 2026

Principal ASIC / RTL Design Engineer

, regarding overall project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing...Job Category: Engineering, Design Degree Level: Bachelors Job Description: OnSemi is seeking a Principal Digital...

Company: onsemi
Posted Date: 23 Jan 2026

Senior Principal Engineer, RTL ASIC Design

collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the... Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation...

Company: Marvell
Posted Date: 09 Jan 2026

Principal Engineer, ASIC Development Engineering (High Bandwidth Flash Frontend)

familiarity with Firmware and ASIC design KV cache optimization, Flash Attention, Mixture of Experts Expertise in CUDA... Bandwidth Flash (HBF) based advanced system architectures and AI/ML Accelerator ASIC architecture specifications for Sandisk...

Company: SanDisk
Posted Date: 31 Jan 2026

Principal Engineer - ASIC Digital Design IP Development (Ethernet/UALink Protocols)

Eligible No Date Posted 26/11/2025 Alternate Job Titles: Principal Engineer - ASIC Digital Design IP Development (Ethernet....Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs Principal Engineer - ASIC Digital...

Company: Synopsys
Posted Date: 30 Jan 2026

ASIC Digital Design, Principal Engineer

.Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs ASIC Digital Design, Principal... Digital Design Principal Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal ASIC Design Engineer

in semiconductor product development. Proven expertise in SoC architecture, IP selection, RTL design and verification Strong grasp...Job Category: Engineering Degree Level: Bachelors Job Description: About onsemi onsemi (Nasdaq: ON) is a global...

Company: onsemi
Posted Date: 20 Jan 2026

Staff/Principal Engineer – ASIC Digital Design

Design and develop RTL in Central Engineering team for products which includes blocks such as wakeup sequencing... teams to test, debug and root-cause RTL simulation/Silicon/FPGA failures. RTL development experience Good knowledge...

Company: Micron
Posted Date: 04 Dec 2025

Principal ASIC Digital Verification Engineer- IP Development

Verification Engineer- IP Development Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview.../2025 Job Title: ASIC Digital Verification- Principal Engineer We Are: At Synopsys, we drive the innovations...

Company: Synopsys
Posted Date: 30 Jan 2026

ASIC Verification, Principal Engineer

technological innovation. You Are: You are an experienced and innovative ASIC Digital Design Principal Engineer with a passion... Job Description Category Engineering Hire Type Employee Job ID 5055 Remote Eligible No Date Posted 07/10/2025 Principal Verification Engineer...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal Engineer, VLSI Design Engineering

individual will be responsible for Logic design development and ownership of the RTL modules. The individual has to exhibit.... Job Description Job Description Looking for an experienced engineer to join a team working on the Logic Design of 3D NAND flash memory. As part of the design team, the...

Company: SanDisk
Posted Date: 28 Jan 2026

Applications Engineering, Principal Engineer

, Principal Engineer Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware... At least 5+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Principal Engineer

, Principal Engineer Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware... should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing) RTL to GDSII full flow experience...

Company: Synopsys
Posted Date: 29 Jan 2026

Principal Physical Design Engineer

Digital Physical Design Engineer Role Overview A Principal Digital Physical Design Engineer will own and execute the... or a related discipline. 10+ years’ hands-on experience in all aspects of digital physical design for ASIC/SoC development...

Posted Date: 21 Nov 2025

Principal Engineer, Physical Design

from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow... development and improvement of physical design methodologies and flow automation. Qualifications: Minimum Qualifications...

Company: Intel
Posted Date: 15 Jan 2026

Senior Principal Engineer, Physical Design

in major foundries. Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure. In-depth... design capabilities and infrastructure in alignment with company-wide technology strategy. Lead RTL-to-GDSII implementation...

Company: Marvell
Posted Date: 13 Dec 2025

Principal DFT Engineer

Digital DFT Engineer Role Summary The Principal Digital DFT Engineer is responsible for architecting, implementing... for stuck-at, transition, and critical path faults. Integrate DFT with RTL and physical design teams; resolve complex trade...

Posted Date: 19 Nov 2025