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Keywords: Physical Design Lead Engineer, Location: India

Page: 9

Design Verification Engineer

your career. MTS SILICON DESIGN ENGINEER THE ROLE: As an MTS Design Verification Engineer in AMD’s Infinity (Data) Fabric... team, you will be a technical engineer responsible for driving verification of high-performance, scalable fabric IP...

Posted Date: 20 Nov 2025

Principal Digital Design Engineer

Engineer About the Role As a Principal Digital Design Engineer, you will drive technical strategy and innovation for complex... talent. Key Responsibilities Define product and technology strategy for digital design initiatives Lead architecture...

Posted Date: 19 Nov 2025

Senior Principal Engineer - RTL Design

and best practices Work with third party vendors to define customization requirements of third party IPs Work with the physical design..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Data Centre Engineering Group...

Company: Marvell
Location: Pune, Maharashtra
Posted Date: 14 Feb 2026

ASIC Design Verification Engineer

and efficient performance. Support testing of design in emulation. Lead all aspects of and manage the ASIC bring-up process... and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and advised...

Company: Cisco Systems
Posted Date: 13 Feb 2026

IP Design Verification Engineer

Job Details: Job Description: As the Turbo IP (TIP) Verification technical Lead, you will own and drive the... to manage complex verification projects across global teams. You will collaborate with architecture, design, firmware...

Company: Intel
Posted Date: 13 Feb 2026

Senior Principal Digital Design Engineer

analysis with PD engg, Physical Design (PD) interface for the power management chips The candidate will be able to work... on digital design architecture, digital RTL, low power design, synthesis and timing analysis with PD engg, Physical Design (PD...

Company: onsemi
Posted Date: 13 Feb 2026

Sr Principal Digital Design Engineer

with PD engg, Physical Design (PD) interface for the power management chips The candidate will be able to work as part..., digital RTL, low power design, synthesis and timing analysis with PD engg, Physical Design (PD) interface for the power...

Company: onsemi
Posted Date: 13 Feb 2026

RTL Design Engineer

and debug activities, collaborate with Physical Design (PD) teams on timing closure, floorplanning, and wrapper-level... tools for power optimization, and physical-aware design methodologies, while developing UPF/SDC collaterals, managing clock...

Company: Quest Global
Posted Date: 07 Feb 2026

ASIC Design Verification Engineer | UVM | Exp. 8+ years

and efficient performance. Support testing of design in emulation. Lead all aspects of and manage the ASIC bring-up process... plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random...

Company: Cisco Systems
Posted Date: 06 Feb 2026

GPU Design Verification Engineer

AI products.We strive to lead the industry through continuous innovation and world-class engineering.... We are looking for Experienced Pre-Silicon RTL Design and Verification engineers, where you will work closely with architects/micro-arch...

Company: Intel
Posted Date: 06 Feb 2026

SoC Design Verification Engineer

, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural...Job Details: Job Description: Performs functional logic verification of an integrated SoC to ensure design will meet...

Company: Intel
Posted Date: 05 Feb 2026

Senior Hardware ASIC Arch/Design Engineer

with Physical-design teams for Area/Floorplan refinement, Timing targets etc. · Define and document interface specifications..., control/status logic, and pipeline structures. · Lead PPA analysis and trade-off discussions across RTL and architecture...

Posted Date: 30 Jan 2026

Senior Hardware ASIC Arch/Design Engineer

implementation, ensuring consistency with architectural intent and timing/power goals Collaborate with Physical-design teams..., and pipeline structures. Lead PPA analysis and trade-off discussions across RTL and architecture. Modelling & Analysis Develop...

Posted Date: 30 Jan 2026

ASIC Design Verification Engineer | UVM | Exp- 8+ Years

and efficient performance. Support testing of design in emulation. Lead all aspects of and manage the ASIC bring-up process... plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random...

Company: Cisco Systems
Posted Date: 26 Jan 2026

Hardware Engineer || FPGA/Design Verifcation,UVM,UMM || Exp - 7 to 11 Years

teams based in US and Italy. Your Impact Lead and mentor a team of verification engineers, driving the development... Qualifications Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design...

Company: Cisco Systems
Posted Date: 26 Jan 2026

Thermal Design Engineer |Electronic Packaging | Flotherm | Exp 4-8 years | Grade 08 | 2006785

. Your Impact: May lead small scale mechanical engineering projects (one to two features) with manageable risks and resource... design testing, failure analysis, reliability, environmental testing and verification plans for developed design elements...

Company: Cisco Systems
Posted Date: 26 Jan 2026

Senior Principal SoC Design Engineer

, and design reviews. Lead RTL design, verification, and synthesis for complex SoCs. Collaborate with cross-functional teams.... Proficiency in RTL (Verilog/SystemVerilog), synthesis, timing closure. Comfortable working with Synthesis/STA/Physical Design...

Posted Date: 15 Jan 2026

Fellow Silicon Design Engineer

of innovation. As a Fellow-level Verification Architect, you will define and lead the verification architecture and methodology... in build/run/report pipelines. Cross-Functional & Global Leadership: Lead distributed teams across sites/time zones...

Posted Date: 14 Jan 2026

Senior Principal Engineer, RTL ASIC Design

customization requirements of third party IPs (controller, PHY, etc.) Work with the physical design teams, reviewing and providing..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact About Marvell Marvell...

Company: Marvell
Posted Date: 09 Jan 2026

Principal Engineer, RTL ASIC Design

with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit...

Company: Marvell
Posted Date: 07 Jan 2026